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Searched refs:NV04_PFIFO_CACHE1_PULL0 (Results 1 – 5 of 5) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
Dnv04.c212 nv_mask(priv, NV04_PFIFO_CACHE1_PULL0, 0x00000001, 0); in nv04_fifo_chan_fini()
232 nv_wr32(priv, NV04_PFIFO_CACHE1_PULL0, 1); in nv04_fifo_chan_fini()
311 nv_mask(priv, NV04_PFIFO_CACHE1_PULL0, 0x00000001, 0x00000000); in nv04_fifo_pause()
322 if (!nv_wait(priv, NV04_PFIFO_CACHE1_PULL0, in nv04_fifo_pause()
326 if (nv_rd32(priv, NV04_PFIFO_CACHE1_PULL0) & in nv04_fifo_pause()
340 nv_mask(priv, NV04_PFIFO_CACHE1_PULL0, 0x00000001, 0x00000001); in nv04_fifo_start()
451 nv_wr32(priv, NV04_PFIFO_CACHE1_PULL0, 1); in nv04_fifo_cache_error()
533 nv_wr32(priv, NV04_PFIFO_CACHE1_PULL0, 1); in nv04_fifo_intr()
621 nv_wr32(priv, NV04_PFIFO_CACHE1_PULL0, 1); in nv04_fifo_init()
Dnv04.h114 #define NV04_PFIFO_CACHE1_PULL0 0x00003250 macro
Dnv17.c201 nv_wr32(priv, NV04_PFIFO_CACHE1_PULL0, 1); in nv17_fifo_init()
Dnv40.c342 nv_wr32(priv, NV04_PFIFO_CACHE1_PULL0, 1); in nv40_fifo_init()
/linux-4.1.27/drivers/gpu/drm/nouveau/
Dnouveau_reg.h549 #define NV04_PFIFO_CACHE1_PULL0 0x00003250 macro