Searched refs:NV03_PFIFO_CACHE1_PUSH1 (Results 1 - 5 of 5) sorted by relevance
| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| H A D | nv04.c | 208 chid = nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH1) & priv->base.max; nv04_fifo_chan_fini()
230 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH1, priv->base.max); nv04_fifo_chan_fini()
512 chid = nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH1) & priv->base.max; nv04_fifo_intr()
615 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH1, priv->base.max); nv04_fifo_init()
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| H A D | nv04.h | 36 #define NV03_PFIFO_CACHE1_PUSH1 0x00003204 macro
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| H A D | nv17.c | 195 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH1, priv->base.max); nv17_fifo_init()
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| H A D | nv40.c | 336 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH1, priv->base.max); nv40_fifo_init()
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| /linux-4.1.27/drivers/gpu/drm/nouveau/ |
| H A D | nouveau_reg.h | 471 #define NV03_PFIFO_CACHE1_PUSH1 0x00003204 macro
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