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Searched refs:MVPP2_CPU_D_CACHE_LINE_SIZE (Results 1 – 1 of 1) sorted by relevance

/linux-4.1.27/drivers/net/ethernet/marvell/
Dmvpp2.c321 #define MVPP2_CPU_D_CACHE_LINE_SIZE 32 macro
377 ETH_HLEN + ETH_FCS_LEN, MVPP2_CPU_D_CACHE_LINE_SIZE)
4480 PTR_ALIGN(aggr_txq->descs, MVPP2_CPU_D_CACHE_LINE_SIZE)); in mvpp2_aggr_txq_init()
4512 PTR_ALIGN(rxq->descs, MVPP2_CPU_D_CACHE_LINE_SIZE)); in mvpp2_rxq_init()
4603 PTR_ALIGN(txq->descs, MVPP2_CPU_D_CACHE_LINE_SIZE)); in mvpp2_txq_init()