Searched refs:MSR_IA32_MCx_STATUS (Results 1 – 5 of 5) sorted by relevance
379 if (msr == MSR_IA32_MCx_STATUS(bank)) in msr_to_offset()644 m.status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i)); in machine_check_poll()689 mce_wrmsrl(MSR_IA32_MCx_STATUS(i), 0); in machine_check_poll()714 m->status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i)); in mce_no_way_out()1009 mce_wrmsrl(MSR_IA32_MCx_STATUS(i), 0); in mce_clear_state()1096 m.status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i)); in do_machine_check()1473 wrmsrl(MSR_IA32_MCx_STATUS(i), 0); in __mcheck_cpu_init_generic()
325 rdmsrl(MSR_IA32_MCx_STATUS(bank), m.status); in amd_threshold_interrupt()332 wrmsrl(MSR_IA32_MCx_STATUS(bank), 0); in amd_threshold_interrupt()
151 wrmsr_on_cpu(cpu, MSR_IA32_MCx_STATUS(b), in do_inject()
234 #define MSR_IA32_MCx_STATUS(x) (MSR_IA32_MC0_STATUS + 4*(x)) macro
1830 native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0, 0); in is_erratum_383()