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Searched refs:LVDS (Results 1 – 29 of 29) sorted by relevance

/linux-4.1.27/Documentation/devicetree/bindings/drm/imx/
Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
3 LVDS Display Bridge
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
7 nodes describing each of the two LVDS encoder channels of the bridge.
15 interfaces as input for each LVDS channel.
17 The phandle points to the iomuxc-gpr region containing the LVDS
23 "di0_pll" - LDB LVDS channel 0 mux
24 "di1_pll" - LDB LVDS channel 1 mux
25 "di0" - LDB LVDS channel 0 gate
26 "di1" - LDB LVDS channel 1 gate
[all …]
/linux-4.1.27/drivers/gpu/drm/bridge/
DKconfig7 tristate "PTN3460 DP/LVDS bridge"
13 ptn3460 eDP-LVDS bridge chip driver.
16 tristate "Parade eDP/LVDS bridge"
24 parade eDP-LVDS bridge chip driver.
/linux-4.1.27/Documentation/devicetree/bindings/video/
Drenesas,du.txt14 LVDS encoder (named "lvds.x" with "x" being the LVDS controller numerical
26 per LVDS encoder. The functional clocks must be named "du.x" with "x"
27 being the channel numerical index. The LVDS clocks must be named
28 "lvds.x" with "x" being the LVDS encoder numerical index.
45 R8A7790 (H2) DPAD LVDS 0 LVDS 1
46 R8A7791 (M2) DPAD LVDS 0 -
Dthine,thc63lvdm83d1 THine Electronics THC63LVDM83D LVDS serializer
4 The THC63LVDM83D is an LVDS serializer designed to support pixel data
21 - Video port 1 for LVDS output
/linux-4.1.27/drivers/gpu/drm/rcar-du/
DKconfig22 bool "R-Car DU LVDS Encoder Support"
26 Enable support for the R-Car Display Unit embedded LVDS encoders
/linux-4.1.27/drivers/gpu/drm/imx/
DKconfig37 tristate "Support for LVDS displays"
41 Choose this to enable the internal LVDS Display Bridge (LDB)
/linux-4.1.27/drivers/gpu/drm/i915/
Di915_suspend.c44 dev_priv->regfile.saveLVDS = I915_READ(LVDS); in i915_save_display()
79 I915_WRITE(LVDS, dev_priv->regfile.saveLVDS & mask); in i915_restore_display()
Dintel_lvds.c107 lvds_reg = LVDS; in intel_lvds_get_config()
1016 lvds_encoder->reg = LVDS; in intel_lvds_init()
1114 lvds = I915_READ(LVDS); in intel_lvds_init()
Dintel_display.c1260 if (I915_READ(LVDS) & LVDS_PIPEB_SELECT) in assert_panel_unlocked()
6906 I915_READ(LVDS) & LVDS_BORDER_ENABLE; in i9xx_get_pfit_config()
9273 u32 lvds = IS_I830(dev) ? 0 : I915_READ(LVDS); in i9xx_crtc_clock_get()
Di915_reg.h3009 #define LVDS 0x61180 macro
/linux-4.1.27/drivers/gpu/drm/gma500/
Dpsb_intel_display.c235 u32 lvds = REG_READ(LVDS); in psb_intel_crtc_mode_set()
255 REG_WRITE(LVDS, lvds); in psb_intel_crtc_mode_set()
256 REG_READ(LVDS); in psb_intel_crtc_mode_set()
327 is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN); in psb_intel_crtc_clock_get()
Dcdv_intel_display.c718 if ((REG_READ(LVDS) & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP) in cdv_intel_crtc_mode_set()
749 u32 lvds = REG_READ(LVDS); in cdv_intel_crtc_mode_set()
768 REG_WRITE(LVDS, lvds); in cdv_intel_crtc_mode_set()
769 REG_READ(LVDS); in cdv_intel_crtc_mode_set()
868 is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN); in cdv_intel_crtc_clock_get()
DKconfig24 platforms with LVDS ports. MIPI is not currently supported.
Doaktrail_lvds.c112 lvds_port = (REG_READ(LVDS) & in oaktrail_lvds_mode_set()
122 REG_WRITE(LVDS, lvds_port); in oaktrail_lvds_mode_set()
Dpsb_intel_lvds.c276 lvds_priv->saveLVDS = REG_READ(LVDS); in psb_intel_lvds_save()
329 REG_WRITE(LVDS, lvds_priv->saveLVDS); in psb_intel_lvds_restore()
806 lvds = REG_READ(LVDS); in psb_intel_lvds_init()
Doaktrail_device.c248 regs->psb.saveLVDS = PSB_RVDC32(LVDS); in oaktrail_save_display_registers()
372 PSB_WVDC32(regs->psb.saveLVDS, LVDS); /*port 61180h*/ in oaktrail_restore_display_registers()
Dcdv_device.c291 regs->cdv.saveLVDS = REG_READ(LVDS); in cdv_save_display_registers()
359 REG_WRITE(LVDS, regs->cdv.saveLVDS); in cdv_restore_display_registers()
Dgma_display.c741 (REG_READ(LVDS) & LVDS_PORT_EN) != 0) { in gma_find_best_pll()
748 if ((REG_READ(LVDS) & LVDS_CLKB_POWER_MASK) == in gma_find_best_pll()
Dcdv_intel_lvds.c741 lvds = REG_READ(LVDS); in cdv_intel_lvds_init()
Dpsb_intel_reg.h448 #define LVDS 0x61180 macro
/linux-4.1.27/drivers/gpu/drm/radeon/
Dsmu7.h161 LVDS, enumerator
/linux-4.1.27/drivers/video/fbdev/nvidia/
Dnv_setup.c660 par->LVDS = 0; in NVCommonSetup()
664 par->LVDS = 1; in NVCommonSetup()
665 printk("nvidiafb: Panel is %s\n", par->LVDS ? "LVDS" : "TMDS"); in NVCommonSetup()
Dnv_type.h134 int LVDS; member
/linux-4.1.27/arch/arm/boot/dts/
Dimx53-tx53-x13x.dts17 model = "Ka-Ro electronics TX53 module (LVDS)";
Dtegra30-apalis.dtsi335 /* LVDS Transceiver Configuration */
/linux-4.1.27/Documentation/fb/
Dviafb.txt149 12: 12-Bit LVDS or 12-Bit TMDS (default)
150 24: 24-Bit LVDS or 24-Bit TMDS
Dmodedb.txt52 video=LVDS-1:d video=HDMI-1:D
/linux-4.1.27/drivers/video/fbdev/intelfb/
Dintelfbhw.h268 #define LVDS 0x61180 macro
Dintelfbhw.c284 if (INREG(LVDS) & PORT_ENABLE) in intelfbhw_check_non_crt()
580 hw->lvds = INREG(LVDS); in intelfbhw_read_hw_state()