| /linux-4.1.27/drivers/video/fbdev/matrox/ |
| D | matroxfb_maven.c | 522 #define LR(x) maven_set_reg(c, (x), m->regs[(x)]) macro
547 LR(0x00); LR(0x01); LR(0x02); LR(0x03); in maven_init_TV()
549 LR(0x04); in maven_init_TV()
551 LR(0x2C); in maven_init_TV()
552 LR(0x08); in maven_init_TV()
553 LR(0x0A); in maven_init_TV()
554 LR(0x09); in maven_init_TV()
555 LR(0x29); in maven_init_TV()
558 LR(0x0B); in maven_init_TV()
559 LR(0x0C); in maven_init_TV()
[all …]
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| D | matroxfb_g450.c | 502 #define LR(x) cve2_set_reg(minfo, (x), m->regs[(x)]) macro
508 LR(0x80); in cve2_init_TV()
509 LR(0x82); LR(0x83); in cve2_init_TV()
510 LR(0x84); LR(0x85); in cve2_init_TV()
515 LR(i); in cve2_init_TV()
|
| /linux-4.1.27/tools/perf/arch/arm/tests/ |
| D | regs_load.S | 17 #define LR 0x70 macro
54 str lr, [r0, #LR]
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| /linux-4.1.27/arch/arm/kernel/ |
| D | unwind.c | 88 LR = 14, enumerator
353 ctrl->vrs[PC] = ctrl->vrs[LR]; in unwind_exec_insn()
378 ctrl->vrs[FP], ctrl->vrs[SP], ctrl->vrs[LR], ctrl->vrs[PC]); in unwind_exec_insn()
412 ctrl.vrs[LR] = frame->lr; in unwind_frame()
457 ctrl.vrs[PC] = ctrl.vrs[LR]; in unwind_frame()
465 frame->lr = ctrl.vrs[LR]; in unwind_frame()
|
| D | entry-header.S | 171 @ Store/load the USER SP and LR registers by switching to the SYS
|
| D | entry-armv.S | 268 ldrh r0, [r4, #-2] @ Thumb instruction at LR - 2
|
| /linux-4.1.27/Documentation/devicetree/bindings/video/ |
| D | sharp,ls037v7dw01.txt | 14 ordered MO, LR, and UD as specified in the LS037V7DW01.pdf file.
35 &gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */
|
| /linux-4.1.27/arch/powerpc/kernel/ |
| D | swsusp_asm64.S | 89 SAVE_SPECIAL(LR)
136 RESTORE_SPECIAL(LR)
270 RESTORE_SPECIAL(LR)
|
| /linux-4.1.27/Documentation/networking/ |
| D | ixgbe.txt | 49 LR Modules
50 Intel DUAL RATE 1G/10G SFP+ LR (bailed) FTLX1471D3BCV-IT
51 Intel DUAL RATE 1G/10G SFP+ LR (bailed) AFCT-701SDDZ-IN1
52 Intel DUAL RATE 1G/10G SFP+ LR (bailed) AFCT-701SDZ-IN2
61 Finisar SFP+ LR bailed, 10g single rate FTLX1471D3BCL
65 Finisar DUAL RATE 1G/10G SFP+ LR (No Bail) FTLX1471D3QCV-IT
66 Avago DUAL RATE 1G/10G SFP+ LR (No Bail) AFCT-701SDZ-IN1
88 - LAN on Motherboard (LOMs) may support DA, SR, or LR modules. Other module
98 Finisar SFP+ LR bailed, 10g single rate FTLX1471D3BCL
|
| D | ixgb.txt | 56 82597EX Intel(R) PRO/10GbE LR/SR/CX4 10G Base-LR (1310 nm optical fiber)
|
| /linux-4.1.27/arch/arm/mm/ |
| D | proc-v7m.S | 104 mov r6, lr @ save LR
111 mov lr, r6 @ restore LR
|
| /linux-4.1.27/tools/perf/arch/arm/util/ |
| D | unwind-libdw.c | 31 dwarf_regs[14] = REG(LR); in libdw__arch_set_initial_registers()
|
| /linux-4.1.27/arch/arm/lib/ |
| D | backtrace.S | 68 bic sv_pc, sv_pc, mask @ mask PC/LR for the mode
78 bic r1, r1, mask @ mask PC/LR for the mode
|
| /linux-4.1.27/net/ieee802154/ |
| D | Kconfig | 10 Say Y here to compile LR-WPAN support into the kernel or say M to
|
| /linux-4.1.27/arch/powerpc/platforms/52xx/ |
| D | lite5200_sleep.S | 68 SAVE_SPRN(LR, 0x1c)
246 LOAD_SPRN(LR, 0x1c)
|
| /linux-4.1.27/arch/m32r/kernel/ |
| D | entry.S | 109 #define LR(reg) @(0x64,reg) macro
|
| /linux-4.1.27/tools/testing/selftests/powerpc/switch_endian/ |
| D | check.S | 25 addi r9,r15,32 # check LR
|
| /linux-4.1.27/arch/arm/boot/dts/ |
| D | omap3-evm-common.dtsi | 86 &gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */
|
| /linux-4.1.27/arch/m32r/platforms/oaks32r/ |
| D | dot.gdbinit.nommu | 81 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
|
| /linux-4.1.27/arch/powerpc/platforms/8xx/ |
| D | Kconfig | 140 (by not placing conditional branches or branches to LR or CTR
|
| /linux-4.1.27/arch/m32r/platforms/mappi3/ |
| D | dot.gdbinit | 139 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
|
| /linux-4.1.27/arch/m32r/platforms/mappi2/ |
| D | dot.gdbinit.vdec2 | 150 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
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| /linux-4.1.27/arch/m32r/platforms/m32700ut/ |
| D | dot.gdbinit_200MHz_16MB | 151 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
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| D | dot.gdbinit_400MHz_32MB | 151 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
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| D | dot.gdbinit_300MHz_32MB | 151 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
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| /linux-4.1.27/arch/m32r/platforms/mappi/ |
| D | dot.gdbinit | 167 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
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| D | dot.gdbinit.nommu | 167 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
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| D | dot.gdbinit.smp | 235 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$fp
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| /linux-4.1.27/arch/m32r/platforms/opsput/ |
| D | dot.gdbinit | 176 printf "R12[%08lx] FP[%08lx] LR[%08lx] SP[%08lx]\n",$r12,$fp,$lr,$sp
|
| /linux-4.1.27/arch/frv/kernel/ |
| D | switch_to.S | 115 # - SP, FP, LR, GR15, GR28 and GR29 will have been set up appropriately
|
| /linux-4.1.27/Documentation/powerpc/ |
| D | transactional_memory.txt | 62 Checkpointed registers include all GPRs, FPRs, VRs/VSRs, LR, CCR/CR, CTR, FPCSR
|
| /linux-4.1.27/Documentation/frv/ |
| D | kernel-ABI.txt | 131 LR Return address after CALL Clobbered
|
| /linux-4.1.27/scripts/genksyms/ |
| D | parse.tab.c_shipped | 1292 token list. However, the list is correct for canonical LR with
|
| /linux-4.1.27/scripts/kconfig/ |
| D | zconf.tab.c_shipped | 1217 token list. However, the list is correct for canonical LR with
|
| /linux-4.1.27/scripts/dtc/ |
| D | dtc-parser.tab.c_shipped | 1119 token list. However, the list is correct for canonical LR with
|
| /linux-4.1.27/Documentation/s390/ |
| D | Debugging390.txt | 772 0001AFF8' LR 180F CC 0
|