Searched refs:KSEG1 (Results 1 – 20 of 20) sorted by relevance
33 #define JMR3927_PORT_BASE KSEG136 #define JMR3927_ROM0_BASE (KSEG1 + JMR3927_ROMCE0)37 #define JMR3927_ROM1_BASE (KSEG1 + JMR3927_ROMCE1)38 #define JMR3927_IOC_BASE (KSEG1 + JMR3927_ROMCE2)39 #define JMR3927_PCIMEM_BASE (KSEG1 + JMR3927_PCIMEM)40 #define JMR3927_PCIIO_BASE (KSEG1 + JMR3927_PCIIO)
18 #define KSEG1 0xa0000000 macro47 #define KSEG1ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG1))52 #define KSEG1ADDR(a) (((a) & 0x1fffffff) | KSEG1)
36 #define FALCON_CHIPID ((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x0c))37 #define FALCON_CHIPTYPE ((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x38))38 #define FALCON_CHIPCONF ((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x40))
51 pevn_set(KSEG1); in local_flush_tlb_all()107 pevn_set(KSEG1); in local_flush_tlb_range()147 pevn_set(KSEG1); in local_flush_tlb_kernel_range()175 pevn_set(KSEG1); in local_flush_tlb_page()205 pevn_set(KSEG1); in local_flush_tlb_one()
81 #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)89 #define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)99 #define KSEG1 0xa0000000 macro
40 #define BOOT_REG_BASE (KSEG1 | 0x1F200000)46 #define WDT_REG_BASE (KSEG1 | 0x1F8803F0)
36 #define BOOT_REG_BASE (KSEG1 | 0x1F200000)
47 #define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == KSEG1)
104 #define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == KSEG1)
57 set_io_port_base(KSEG1); in plat_mem_setup()
16 #define KSEG1 0xa0000000 macro
49 set_io_port_base(KSEG1); in plat_mem_setup()
82 #define LTQ_MPS_BASE_ADDR (KSEG1 + 0x1F107000)
73 set_io_port_base((unsigned long) KSEG1); in plat_mem_setup()
69 set_io_port_base(KSEG1); in plat_mem_setup()
108 set_io_port_base(KSEG1); in prom_init()
198 set_io_port_base(KSEG1); in plat_mem_setup()
206 set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET); in rbtx4927_mem_setup()
112 addr = t->mapaddr + port - t->ioaddr + KSEG1; /* XXX */ in pcc_iorw()559 dummy_readbuf = *(u_char *)(addr + KSEG1);
165 #define SER_BASE (A_SER_BASE_1 + KSEG1)2634 mdio_val = __raw_readq(KSEG1 + A_MAC_REGISTER(2, R_MAC_MDIO)) & in cs4297a_init()2638 cfg = __raw_readq(KSEG1 + A_SCD_SYSTEM_CFG); in cs4297a_init()2640 __raw_writeq(cfg | M_SYS_SER1_ENABLE, KSEG1+A_SCD_SYSTEM_CFG); in cs4297a_init()2641 cfg = __raw_readq(KSEG1 + A_SCD_SYSTEM_CFG); in cs4297a_init()2651 __raw_writeq(mdio_val, KSEG1+A_MAC_REGISTER(2, R_MAC_MDIO)); in cs4297a_init()2656 __raw_writeq(mdio_val | M_MAC_GENC, KSEG1+A_MAC_REGISTER(2, R_MAC_MDIO)); in cs4297a_init()