Searched refs:HIFN_1_DMA_CSR (Results 1 - 1 of 1) sorted by relevance
| /linux-4.1.27/drivers/crypto/ |
| H A D | hifn_795x.c | 196 #define HIFN_1_DMA_CSR 0x40 /* DMA Status and Control */ macro
219 /* DMA Status and Control Register (HIFN_1_DMA_CSR) */
718 hifn_write_1(dev, HIFN_1_DMA_CSR, hifn_stop_device()
1047 hifn_write_1(dev, HIFN_1_DMA_CSR, hifn_init_registers()
1061 hifn_write_1(dev, HIFN_1_DMA_CSR, hifn_init_registers()
1075 hifn_read_1(dev, HIFN_1_DMA_CSR); hifn_init_registers()
1274 hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_C_CTRL_ENA); hifn_setup_cmd_desc()
1309 hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA); hifn_setup_src_desc()
1336 hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA); hifn_setup_res_desc()
1365 hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_ENA); hifn_setup_dst_desc()
1912 hifn_write_1(dev, HIFN_1_DMA_CSR, r); hifn_work()
1960 dmacsr = hifn_read_1(dev, HIFN_1_DMA_CSR); hifn_interrupt()
1971 hifn_write_1(dev, HIFN_1_DMA_CSR, dmacsr & dev->dmareg); hifn_interrupt()
1989 hifn_write_1(dev, HIFN_1_DMA_CSR, dmacsr & (HIFN_DMACSR_R_OVER | hifn_interrupt()
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