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Searched refs:GIC_CPU_CTRL (Results 1 – 5 of 5) sorted by relevance

/linux-4.1.27/arch/arm/mach-tegra/
Dirq.c58 writel_relaxed(0x1E0, tegra_gic_cpu_base + GIC_CPU_CTRL); in tegra_gic_notifier()
/linux-4.1.27/include/linux/irqchip/
Darm-gic.h13 #define GIC_CPU_CTRL 0x00 macro
/linux-4.1.27/drivers/irqchip/
Dirq-gic.c373 bypass = readl(cpu_base + GIC_CPU_CTRL); in gic_cpu_if_up()
376 writel_relaxed(bypass | GICC_ENABLE, cpu_base + GIC_CPU_CTRL); in gic_cpu_if_up()
436 val = readl(cpu_base + GIC_CPU_CTRL); in gic_cpu_if_down()
438 writel_relaxed(val, cpu_base + GIC_CPU_CTRL); in gic_cpu_if_down()
Dirq-hip04.c272 writel_relaxed(1, base + GIC_CPU_CTRL); in hip04_irq_cpu_init()
/linux-4.1.27/virt/kvm/arm/
Dvgic-v2-emul.c584 case GIC_CPU_CTRL: in handle_cpu_mmio_misc()
643 .base = GIC_CPU_CTRL,