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Searched refs:FLD_MOD (Results 1 – 13 of 13) sorted by relevance

/linux-4.1.27/drivers/video/fbdev/omap2/dss/
Dpll.c259 l = FLD_MOD(l, 1, 0, 0); /* PLL_STOPMODE */ in dss_pll_write_config_type_a()
260 l = FLD_MOD(l, cinfo->n - 1, hw->n_msb, hw->n_lsb); /* PLL_REGN */ in dss_pll_write_config_type_a()
261 l = FLD_MOD(l, cinfo->m, hw->m_msb, hw->m_lsb); /* PLL_REGM */ in dss_pll_write_config_type_a()
263 l = FLD_MOD(l, cinfo->mX[0] ? cinfo->mX[0] - 1 : 0, in dss_pll_write_config_type_a()
266 l = FLD_MOD(l, cinfo->mX[1] ? cinfo->mX[1] - 1 : 0, in dss_pll_write_config_type_a()
272 l = FLD_MOD(l, cinfo->mX[2] ? cinfo->mX[2] - 1 : 0, in dss_pll_write_config_type_a()
275 l = FLD_MOD(l, cinfo->mX[3] ? cinfo->mX[3] - 1 : 0, in dss_pll_write_config_type_a()
287 l = FLD_MOD(l, f, 4, 1); /* PLL_FREQSEL */ in dss_pll_write_config_type_a()
291 l = FLD_MOD(l, f, 3, 1); /* PLL_SELFREQDCO */ in dss_pll_write_config_type_a()
293 l = FLD_MOD(l, 1, 13, 13); /* PLL_REFEN */ in dss_pll_write_config_type_a()
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Dhdmi_wp.c140 r = FLD_MOD(r, vsync_pol, 7, 7); in hdmi_wp_video_config_interface()
141 r = FLD_MOD(r, hsync_pol, 6, 6); in hdmi_wp_video_config_interface()
142 r = FLD_MOD(r, timings->interlace, 3, 3); in hdmi_wp_video_config_interface()
143 r = FLD_MOD(r, 1, 1, 0); /* HDMI_TIMING_MASTER_24BIT */ in hdmi_wp_video_config_interface()
199 r = FLD_MOD(r, aud_fmt->stereo_channels, 26, 24); in hdmi_wp_audio_config_format()
200 r = FLD_MOD(r, aud_fmt->active_chnnls_msk, 23, 16); in hdmi_wp_audio_config_format()
202 r = FLD_MOD(r, aud_fmt->en_sig_blk_strt_end, 5, 5); in hdmi_wp_audio_config_format()
203 r = FLD_MOD(r, aud_fmt->type, 4, 4); in hdmi_wp_audio_config_format()
204 r = FLD_MOD(r, aud_fmt->justification, 3, 3); in hdmi_wp_audio_config_format()
205 r = FLD_MOD(r, aud_fmt->sample_order, 2, 2); in hdmi_wp_audio_config_format()
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Dhdmi4_core.c239 r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_VEN_FOLLOWVSYNC, 5, 5); in hdmi_core_video_config()
240 r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_HEN_FOLLOWHSYNC, 4, 4); in hdmi_core_video_config()
241 r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_BSEL_24BITBUS, 2, 2); in hdmi_core_video_config()
242 r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_EDGE_RISINGEDGE, 1, 1); in hdmi_core_video_config()
253 r = FLD_MOD(r, cfg->op_dither_truc - 3, 7, 6); in hdmi_core_video_config()
254 r = FLD_MOD(r, 1, 5, 5); in hdmi_core_video_config()
256 r = FLD_MOD(r, cfg->op_dither_truc, 7, 6); in hdmi_core_video_config()
257 r = FLD_MOD(r, 0, 5, 5); in hdmi_core_video_config()
263 r = FLD_MOD(r, cfg->deep_color_pkt, 6, 6); in hdmi_core_video_config()
264 r = FLD_MOD(r, cfg->pkt_mode, 5, 3); in hdmi_core_video_config()
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Ddsi.c124 dsi_write_reg(dsidev, idx, FLD_MOD(dsi_read_reg(dsidev, idx), val, start, end))
1849 r = FLD_MOD(r, lane_number + 1, offset + 2, offset); in dsi_set_lane_config()
1850 r = FLD_MOD(r, polarity, offset + 3, offset + 3); in dsi_set_lane_config()
1857 r = FLD_MOD(r, 0, offset + 2, offset); in dsi_set_lane_config()
1858 r = FLD_MOD(r, 0, offset + 3, offset + 3); in dsi_set_lane_config()
1936 r = FLD_MOD(r, ths_prepare, 31, 24); in dsi_cio_timings()
1937 r = FLD_MOD(r, ths_prepare_ths_zero, 23, 16); in dsi_cio_timings()
1938 r = FLD_MOD(r, ths_trail, 15, 8); in dsi_cio_timings()
1939 r = FLD_MOD(r, ths_exit, 7, 0); in dsi_cio_timings()
1943 r = FLD_MOD(r, tlpx_half, 20, 16); in dsi_cio_timings()
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Ddss.c68 dss_write_reg(idx, FLD_MOD(dss_read_reg(idx), val, start, end))
267 l = FLD_MOD(l, 0xf, 19, 15); /* SDI_PDIV */ in dss_sdi_init()
268 l = FLD_MOD(l, datapairs-1, 3, 2); /* SDI_PRSEL */ in dss_sdi_init()
269 l = FLD_MOD(l, 2, 1, 0); /* SDI_BWSEL */ in dss_sdi_init()
273 l = FLD_MOD(l, 0x7, 25, 22); /* SDI_PLL_FREQSEL */ in dss_sdi_init()
274 l = FLD_MOD(l, 0xb, 16, 11); /* SDI_PLL_REGN */ in dss_sdi_init()
275 l = FLD_MOD(l, 0xb4, 10, 1); /* SDI_PLL_REGM */ in dss_sdi_init()
Dhdmi5_core.c331 r = FLD_MOD(r, vsync_pol, 6, 6); in hdmi_core_video_config()
332 r = FLD_MOD(r, hsync_pol, 5, 5); in hdmi_core_video_config()
333 r = FLD_MOD(r, cfg->data_enable_pol, 4, 4); in hdmi_core_video_config()
334 r = FLD_MOD(r, cfg->vblank_osc, 1, 1); in hdmi_core_video_config()
335 r = FLD_MOD(r, cfg->v_fc_config.timings.interlace, 0, 0); in hdmi_core_video_config()
Drfbi.c70 rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end))
330 l = FLD_MOD(l, 1, 0, 0); /* enable */ in rfbi_transfer_area()
332 l = FLD_MOD(l, 1, 4, 4); /* ITE */ in rfbi_transfer_area()
754 l = FLD_MOD(l, rfbi_module+1, 3, 2); /* Select CSx */ in rfbi_configure_bus()
755 l = FLD_MOD(l, 0, 1, 1); /* clear bypass */ in rfbi_configure_bus()
Ddispc.c62 dispc_write_reg(idx, FLD_MOD(dispc_read_reg(idx), val, start, end))
974 val = FLD_MOD(val, chan, shift, shift); in dispc_ovl_set_channel_out()
975 val = FLD_MOD(val, chan2, 31, 30); in dispc_ovl_set_channel_out()
977 val = FLD_MOD(val, channel, shift, shift); in dispc_ovl_set_channel_out()
1107 val = FLD_MOD(val, enable, 9, 9); in dispc_ovl_set_vid_color_conv()
1171 v = FLD_MOD(v, 4, 2, 0); /* GFX BUF top to WB */ in dispc_init_fifos()
1172 v = FLD_MOD(v, 4, 5, 3); /* GFX BUF bottom to WB */ in dispc_init_fifos()
1173 v = FLD_MOD(v, 0, 26, 24); /* WB BUF top to GFX */ in dispc_init_fifos()
1174 v = FLD_MOD(v, 0, 29, 27); /* WB BUF bottom to GFX */ in dispc_init_fifos()
2735 l = FLD_MOD(l, truncation, 10, 10); /* TRUNCATIONENABLE */ in dispc_wb_setup()
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Dvideo-pll.c34 writel_relaxed(FLD_MOD(readl_relaxed(reg), val, start, end), reg)
Dhdmi5.c99 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */ in hdmi_irq_handler()
100 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */ in hdmi_irq_handler()
Dhdmi.h269 hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\
Ddss.h73 #define FLD_MOD(orig, val, start, end) \ macro
/linux-4.1.27/drivers/gpu/drm/gma500/
Dmdfld_dsi_output.h47 #define FLD_MOD(orig, val, start, end) \ macro
51 REG_WRITE(reg, FLD_MOD(REG_READ(reg), val, start, end))