Searched refs:DSP (Results 1 - 200 of 411) sorted by relevance

123

/linux-4.1.27/arch/arm/mach-omap2/
H A Dpowerdomains2xxx_3xxx_data.c15 * The names for the DSP/IVA2 powerdomains are confusing.
17 * Most OMAP chips have an on-board DSP.
19 * On the 2420, this is a 'C55 DSP called, simply, the DSP. Its
20 * powerdomain is called the "DSP power domain." On the 2430, the
21 * on-board DSP is a 'C64 DSP, now called (along with its hardware
23 * the "DSP power domain." On the 3430, the DSP is a 'C64 DSP like the
28 * core, and has nothing to do with the DSP/IVA2.
30 * Ideally the DSP/IVA2 could just be the same powerdomain, but the PRCM
H A Dopp3xxx_data.c115 /* DSP OPP1 */
117 /* DSP OPP2 */
119 /* DSP OPP3 */
121 /* DSP OPP4 */
123 /* DSP OPP5 */
142 /* DSP OPP1 - OPP50 */
144 /* DSP OPP2 - OPP100 */
146 /* DSP OPP3 - OPP-Turbo */
148 /* DSP OPP4 - OPP-SB */
H A Dclockdomains2420_data.c21 * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
56 /* 2420 PM_WKDEP_MPU: CORE, DSP, WKUP */
65 /* 2420 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP */
H A Dclockdomains2430_data.c21 * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
56 /* 2430 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP, MDM */
66 /* 2430 PM_WKDEP_MPU: CORE, DSP, WKUP, MDM */
H A Dclockdomains2xxx_3xxx_data.c21 * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
H A Domap-pm-noop.c5 * drivers, CPUIdle, CPUFreq, and DSP Bridge. It is strictly for
90 * DSP Bridge-specific constraints
H A Dopp4xxx_data.c86 /* TODO: add DSP, aess, fdif, gpu */
162 /* TODO: add DSP, aess, fdif, gpu */
H A Domap24xx.h62 /* DSP SS */
H A Domap_hwmod_2420_data.c65 /* DSP */
305 /* DSP <- L3 interface */
H A Dsleep24xx.S56 * clock can pass into the PRCM can cause problems at DSP and IVA.
H A Dclockdomains3xxx_data.c19 * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
/linux-4.1.27/arch/metag/include/uapi/asm/
H A Dech.h5 * These bits can be set in the top half of the D0.8 register when DSP context
6 * switching is enabled, in order to support partial DSP context save/restore.
10 #define TBICTX_XTDP_BIT 0x0800 /* DSP accumulators/RAM/templates */
/linux-4.1.27/include/media/
H A Dmsp3400.h37 the DSP (the tuner input first goes through the demodulator).
39 The DSP handles things like volume, bass/treble, balance, and some chips
41 and SCART1/2. Each output can select which DSP input to use. So the MAIN
48 Most DSP outputs are also the outputs of the msp3400. However, the SCART
50 SCART2 output from the DSP, or the msp3400 SCART inputs, thus completely
51 bypassing the DSP.
61 3) which DSP input to use for each DSP output
75 /* Inputs to the DSP unit: two independent selections have to be made:
82 /* SCART input to DSP selection */
88 #define MSP_IN_MUTE 7 /* Mute DSP input */
90 /* Tuner input to demodulator and DSP selection */
95 /* The msp has up to 5 DSP outputs, each output can independently select
96 a DSP input.
98 The DSP outputs are: loudspeaker output (aka MAIN), headphones output
105 There are up to 16 DSP inputs to choose from, so each output is
109 DSP. This is currently not implemented. Also not implemented is the
112 #define MSP_DSP_IN_TUNER 0 /* Tuner DSP input */
113 #define MSP_DSP_IN_SCART 2 /* SCART DSP input */
114 #define MSP_DSP_IN_I2S1 5 /* I2S1 DSP input */
115 #define MSP_DSP_IN_I2S2 6 /* I2S2 DSP input */
116 #define MSP_DSP_IN_I2S3 7 /* I2S3 DSP input */
117 #define MSP_DSP_IN_MAIN_AVC 11 /* MAIN AVC processed DSP input */
118 #define MSP_DSP_IN_MAIN 12 /* MAIN DSP input */
119 #define MSP_DSP_IN_AUX 13 /* AUX DSP input */
128 #define MSP_SC_IN_SCART1 0 /* SCART1 input, bypassing the DSP */
129 #define MSP_SC_IN_SCART2 1 /* SCART2 input, bypassing the DSP */
130 #define MSP_SC_IN_SCART3 2 /* SCART3 input, bypassing the DSP */
131 #define MSP_SC_IN_SCART4 3 /* SCART4 input, bypassing the DSP */
132 #define MSP_SC_IN_DSP_SCART1 4 /* DSP SCART1 input */
133 #define MSP_SC_IN_DSP_SCART2 5 /* DSP SCART2 input */
134 #define MSP_SC_IN_MONO 6 /* MONO input, bypassing the DSP */
191 /* DSP inputs vs. msp version (tuner and SCART inputs are always available) */
208 /* DSP outputs vs. msp version */
/linux-4.1.27/sound/oss/
H A Dcoproc.h3 * example DSP processors.
H A Daedsp16.c4 Audio Excel DSP 16 software configuration routines
35 This module started to configure the Audio Excel DSP 16 Sound Card.
38 NOTE: I have NO idea about Audio Excel DSP 16 III. If someone owns this
41 Audio Excel DSP 16 is an SB pro II, Microsoft Sound System and MPU-401
44 so before this module, the only way to configure the DSP under linux was
47 and then ctrl-alt-del to boot linux with the DSP configured by the DOS
50 This module works configuring your Audio Excel DSP 16's irq, dma and
73 The Audio Excel DSP 16 Sound Card emulates both SBPRO and MSS;
189 I/O ports in any case because they are used to access the DSP
240 - Audio Excel DSP 16 III don't work with this driver.
249 #define VERSION "1.3" /* Version of Audio Excel DSP 16 driver */
287 * Commands of AEDSP16's DSP (SBPRO+special).
301 #define GET_DSP_VERSION 0xe1 /* Get DSP Version */
302 #define GET_DSP_COPYRIGHT 0xe3 /* Get DSP Copyright */
305 * Offsets of AEDSP16 DSP I/O ports. The offset is added to base I/O port
313 #define DSP_RESET 0x06 /* offset of DSP RESET (wo) */
314 #define DSP_READ 0x0a /* offset of DSP READ (ro) */
315 #define DSP_WRITE 0x0c /* offset of DSP WRITE (w-) */
316 #define DSP_COMMAND 0x0c /* offset of DSP COMMAND (w-) */
317 #define DSP_STATUS 0x0c /* offset of DSP STATUS (r-) */
318 #define DSP_DATAVAIL 0x0e /* offset of DSP DATA AVAILABLE (ro) */
414 static int ver[CARDVERDIGITS] __initdata = {0, 0}; /* DSP Ver:
446 int irq; /* irq value for DSP I/O */
448 int dma; /* dma value for DSP I/O */
455 * Magic values that the DSP will eat when configuring irq/mirq/dma
457 /* DSP IRQ conversion array */
527 DBG((" Read DSP Byte (0x%x): ", port)); aedsp16_read()
549 * Reset DSP aedsp16_dsp_reset()
552 DBG(("Reset DSP:\n")); aedsp16_dsp_reset()
572 DBG((" Write DSP Byte (0x%x) [0x%x]: ", port, cmd)); aedsp16_write()
577 * DSP ready to receive data if bit 7 of ret == 0 aedsp16_write()
587 printk("[AEDSP16] DSP Command (0x%x) timeout.\n", cmd); aedsp16_write()
943 DBG(("Get DSP Version:\n")); aedsp16_dsp_version()
974 DBG(("Get DSP Copyright:\n")); aedsp16_dsp_copyright()
1097 printk("Audio Excel DSP 16 init v%s (%s %s) [", aedsp16_init_board()
1319 MODULE_DESCRIPTION("Audio Excel DSP 16 Driver Version " VERSION);
1323 printk("Audio Excel DSP 16 init driver Copyright (C) Riccardo Facchetti 1995-98\n"); do_init_aedsp16()
H A Dmsnd_pinnacle.c893 /* Tell the DSP to play the bank */ pack_DAPF_to_DAPQ()
1083 /* printk(KERN_DEBUG LOGNAME ": DSP message %d 0x%02x\n", eval_dsp_msg()
1102 /* Send ack to DSP */ intr()
1105 /* Evaluate queued DSP messages */ intr()
1145 printk(KERN_ERR LOGNAME ": Cannot reset DSP\n"); reset_dsp()
1255 /* DSP -> host message queue */ init_sma()
1259 /* Setup some DSP values */ init_sma()
1321 printk(KERN_WARNING LOGNAME ": Error uploading to DSP\n"); upload_dsp_code()
1326 printk(KERN_INFO LOGNAME ": DSP firmware uploaded (resident)\n"); upload_dsp_code()
1328 printk(KERN_INFO LOGNAME ": DSP firmware uploaded\n"); upload_dsp_code()
1369 printk(KERN_WARNING LOGNAME ": Cannot upload DSP code\n"); initialize()
1377 printk(KERN_DEBUG LOGNAME ": DSP reset timeout\n"); initialize()
1395 printk(KERN_INFO LOGNAME ": DSP reset\n"); dsp_full_reset()
1398 printk(KERN_WARNING LOGNAME ": DSP reset failed\n"); dsp_full_reset()
1434 printk(KERN_ERR LOGNAME ": Unable to register DSP operations\n"); attach_multisound()
1583 case 0: /* DSP */ msnd_pinnacle_cfg_devices()
1770 printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must be set to 0x210, 0x220, 0x230, 0x240, 0x250, 0x260, 0x290, or 0x3E0\n"); msnd_init()
1778 printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must within the range 0x100 to 0x3E0 and must be evenly divisible by 0x10\n"); msnd_init()
1833 /* DSP */ msnd_init()
H A Dsb.h13 /* DSP Commands */
45 #define MDL_AEDSP 15 /* Audio Excel DSP 16 */
H A Dpss.c162 * Normally the DSP should be ready to accept commands after just couple of pss_write()
174 printk(KERN_WARNING "PSS: DSP Command (%04x) Timeout.\n", data); pss_write()
318 /*_____ Warn DSP software that a boot is coming */ pss_download_boot()
764 printk(KERN_ERR "PSS: Unable to load MIDI synth microcode to DSP.\n"); probe_pss_mpu()
769 * Finally wait until the DSP algorithm has initialized itself and probe_pss_mpu()
806 printk(KERN_ERR "PSS: Unable to load MIDI synth microcode to DSP.\n"); pss_coproc_open()
828 printk(KERN_ERR "PSS: Unable to load MIDI synth microcode to DSP.\n"); pss_coproc_reset()
840 printk(KERN_ERR "PSS: Unable to load microcode block to DSP.\n"); download_boot_block()
H A Dsb_common.c97 * Normally the DSP should be ready to accept commands after just couple of sb_dsp_command()
109 printk(KERN_WARNING "Sound Blaster: DSP command(%x) timeout.\n", val); sb_dsp_command()
139 return; /* Not a DSP interrupt */ sb_intr()
275 DDB(printk("DSP version %d.%02d\n", devc->major, devc->minor)); dsp_get_vers()
385 * by returning 0x12 as response to DSP command 0xfa. init_Jazz16()
761 * ALS007 and ALS100 return DSP version 4.2 and have 2 post-reset !=0 sb_dsp_init()
844 printk(KERN_INFO "SB DSP version is just %d.%02d which means that your card is\n", devc->major, devc->minor); sb_dsp_init()
H A Dsb_midi.c23 * The DSP channel can be used either for input or output. Variable
H A Dsb_card.c109 printk(KERN_ERR "sb: Failed DSP Detect.\n"); sb_register_oss()
114 printk(KERN_ERR "sb: Failed DSP init.\n"); sb_register_oss()
/linux-4.1.27/sound/soc/intel/atom/
H A DMakefile6 # DSP driver
H A Dsst-atom-controls.h62 * Audio DSP Path Ids. Specified by the audio DSP FW
167 * Enumeration for indexing the gain cells in VB_SET_GAIN DSP command
206 * Audio DSP module IDs specified by FW spec
/linux-4.1.27/sound/pci/ice1712/
H A Dhoontech.h28 "{Hoontech,SoundTrack DSP 24}," \
29 "{Hoontech,SoundTrack DSP 24 Value}," \
30 "{Hoontech,SoundTrack DSP 24 Media 7.1}," \
33 #define ICE1712_SUBDEVICE_STDSP24 0x12141217 /* Hoontech SoundTrack Audio DSP 24 */
34 #define ICE1712_SUBDEVICE_STDSP24_VALUE 0x00010010 /* A dummy id for Hoontech SoundTrack Audio DSP 24 Value */
41 /* Hoontech SoundTrack Audio DSP 24 GPIO definitions */
58 /* Hoontech SoundTrack Audio DSP 24 box configuration definitions */
71 /* Hoontech SoundTrack Audio DSP 24 Value definitions for modified hardware */
H A Dwm8766.h49 #define WM8766_IF_DSP_LATE (1 << 2) /* in DSP mode */
H A Dwm8776.h65 #define WM8776_FMT_DSP_LATE (1 << 2) /* in DSP mode */
/linux-4.1.27/drivers/isdn/hardware/eicon/
H A Dmi_pc.h31 #define BRI_RAY_TAYLOR_DSP_CODE_SIZE 0x00020000 /* max 128k DSP-Code (Ray Taylor's code) */
32 #define BRI_ORG_MAX_DSP_CODE_SIZE 0x00050000 /* max 320k DSP-Code (Telindus) */
33 #define BRI_V90D_MAX_DSP_CODE_SIZE 0x00060000 /* max 384k DSP-Code if V.90D included */
55 #define MP_RAY_TAYLOR_DSP_CODE_SIZE 0x00040000 /* max 256k DSP-Code (Ray Taylor's code) */
56 #define MP_ORG_MAX_DSP_CODE_SIZE 0x00060000 /* max 384k DSP-Code (Telindus) */
57 #define MP_V90D_MAX_DSP_CODE_SIZE 0x00070000 /* max 448k DSP-Code if V.90D included) */
58 #define MP_VOIP_MAX_DSP_CODE_SIZE 0x00090000 /* max 576k DSP-Code if voice over IP included */
105 #define MQ_BOARD_DSP_OFFSET 0xa00000 /* PC relative On board DSP regs offset */
106 #define MQ_DSP1_ADDR_OFFSET 0x0008 /* Addr register offset DSP 1 subboard 1 */
107 #define MQ_DSP2_ADDR_OFFSET 0x0208 /* Addr register offset DSP 2 subboard 1 */
108 #define MQ_DSP1_DATA_OFFSET 0x0000 /* Data register offset DSP 1 subboard 1 */
109 #define MQ_DSP2_DATA_OFFSET 0x0200 /* Data register offset DSP 2 subboard 1 */
110 #define MQ_DSP_JUNK_OFFSET 0x0400 /* DSP Data/Addr regs subboard offset */
111 #define MQ_ISAC_DSP_RESET 0x0028 /* ISAC and DSP reset address offset */
112 #define MQ_BOARD_ISAC_DSP_RESET 0x800028 /* ISAC and DSP reset address offset */
117 #define MQ_ORG_MAX_DSP_CODE_SIZE 0x00050000 /* max 320k DSP-Code (Telindus) */
118 #define MQ_V90D_MAX_DSP_CODE_SIZE 0x00060000 /* max 384K DSP-Code if V.90D included */
119 #define MQ_VOIP_MAX_DSP_CODE_SIZE 0x00028000 /* max 4*160k = 640K DSP-Code if voice over IP included */
126 #define MQ2_BOARD_DSP_OFFSET 0x800000 /* PC relative On board DSP regs offset */
127 #define MQ2_DSP1_DATA_OFFSET 0x1800 /* Data register offset DSP 1 subboard 1 */
128 #define MQ2_DSP1_ADDR_OFFSET 0x1808 /* Addr register offset DSP 1 subboard 1 */
129 #define MQ2_DSP2_DATA_OFFSET 0x1810 /* Data register offset DSP 2 subboard 1 */
130 #define MQ2_DSP2_ADDR_OFFSET 0x1818 /* Addr register offset DSP 2 subboard 1 */
131 #define MQ2_DSP_JUNK_OFFSET 0x1000 /* DSP Data/Addr regs subboard offset */
132 #define MQ2_ISAC_DSP_RESET 0x0000 /* ISAC and DSP reset address offset */
133 #define MQ2_BOARD_ISAC_DSP_RESET 0x800000 /* ISAC and DSP reset address offset */
H A Ddsp_tst.h7 DSP registers on maestra pri
H A Dos_pri.c26 DSP detection/validation by Anthony Booth (Eicon Networks, www.eicon.com)
909 ** Checks presence of DSP on board
923 DBG_TRC(("W: DSP[%d] %04x(is) != %04x(should)", dsp_check_presence()
935 DBG_ERR(("A: DSP[%d] %04x(is) != %04x(should)", dsp_check_presence()
940 DBG_TRC(("DSP[%d] present", dsp)) dsp_check_presence()
947 ** Check if DSP's are present and operating
948 ** Information about detected DSP's is returned as bit mask
1018 DBG_ERR(("A: MODULE[%d]-DSP[%d] failed", diva_pri_detect_dsps()
1027 DBG_ERR(("A: ON BOARD-DSP[1] failed")) diva_pri_detect_dsps()
1030 DBG_ERR(("A: ON BOARD-DSP[2] failed")) diva_pri_detect_dsps()
1037 DBG_LOG(("| DSP MODULE POPULATION |")) diva_pri_detect_dsps()
1048 DBG_LOG(("DSP's(present-absent):%08x-%08x", ret, diva_pri_detect_dsps()
H A Ddsp_defs.h59 /* special DSP file for BRI cards for Qsig and CornetN because of missing memory */
136 word size; /* DSP words */
151 word size; /* DSP words */
158 word size; /* DSP words */
H A Dsdp_hdr.h29 The soft DSP image is described by binary header contained on begin of this
/linux-4.1.27/arch/m68k/include/asm/
H A Ddsp56k.h13 /* Used for uploading DSP binary code */
19 /* For the DSP host flags */
31 #define DSP56K_UPLOAD 1 /* Upload DSP binary program */
/linux-4.1.27/arch/arm/mach-sa1100/include/mach/
H A Dshannon.h8 #define SHANNON_GPIO_SPI_DSP GPIO_GPIO (1) /* Output - Driven low, enables SPI to DSP */
10 #define SHANNON_GPIO_SPI_OUTPUT GPIO_GPIO (10) /* Output - SPI output to DSP */
11 #define SHANNON_GPIO_SPI_INPUT GPIO_GPIO (11) /* Input - SPI input from DSP */
19 #define SHANNON_GPIO_DSP_RESET GPIO_GPIO (17) /* Output - Drive low to reset the DSP */
/linux-4.1.27/sound/pci/asihpi/
H A Dhpi6000.h19 Public declarations for DSP Proramming Interface to TI C6701
21 Shared between hpi6000.c and DSP code
33 * The DSP should make sure that dwControlCacheSizeInBytes is initialized to 0
60 /* Command/status exchanged between host and DSP */
H A Dhpidspcd.h21 Functions for reading DSP code to load into DSP
64 /** internal state of DSP code reader */
76 /** Pointer to DSP code control structure */
81 /** Close the DSP code file */
84 /** Rewind to the beginning of the DSP code file (for verify) */
91 /**< DSP code descriptor */
H A Dhpi6000.c20 These PCI bus adapters are based on the TI C6711 DSP.
27 PROFILE_DSP2 get profile data from DSP2 if present (instead of DSP 1)
85 /* can't access DSP HPI i/f */
87 /* can't access internal DSP memory */
346 /* Don't even try to communicate with crashed DSP */ HPI_6000()
482 /* BAR1 - 32K = HPI registers on DSP */ create_adapter_obj()
488 /* set addresses for the possible DSP HPI interfaces */ create_adapter_obj()
518 /* of the first DSP in the bootload section. */ create_adapter_obj()
525 HPI_DEBUG_LOG(INFO, "bootload DSP OK\n"); create_adapter_obj()
534 struct hpi_response hr0; /* response from DSP 0 */ create_adapter_obj()
535 struct hpi_response hr1; /* response from DSP 1 */ create_adapter_obj()
629 hw_message(pao, phm, phr); /*get DSP asserts */ adapter_get_asserts()
673 * set RST3-=1 to disconnect HAD8 to set DSP in little endian mode hpi6000_adapter_boot_load_dsp()
692 /* Indicate that DSP#0,1 is a C6X */ hpi6000_adapter_boot_load_dsp()
699 /* isolate DSP HAD8 line from PCI2040 so that hpi6000_adapter_boot_load_dsp()
709 dw2040_reset = dw2040_reset & (~0x00000001); /* start DSP 0 */ hpi6000_adapter_boot_load_dsp()
711 dw2040_reset = dw2040_reset & (~0x00000002); /* start DSP 1 */ hpi6000_adapter_boot_load_dsp()
714 /* set HAD8 back to PCI2040, now that DSP set to little endian mode */ hpi6000_adapter_boot_load_dsp()
717 /*delay to allow DSP to get going */ hpi6000_adapter_boot_load_dsp()
720 /* loop through all DSPs, downloading DSP code */ hpi6000_adapter_boot_load_dsp()
724 /* configure DSP so that we download code into the SRAM */ hpi6000_adapter_boot_load_dsp()
780 /* test r/w to internal DSP memory hpi6000_adapter_boot_load_dsp()
795 "DSP mem %x %x %x %x\n", hpi6000_adapter_boot_load_dsp()
860 /* need to use this else DSP code crashes */ hpi6000_adapter_boot_load_dsp()
875 /* need to use this else DSP code crashes */ hpi6000_adapter_boot_load_dsp()
900 /* delay a little to allow SDRAM and DSP to "get going" */ hpi6000_adapter_boot_load_dsp()
913 "DSP dram %x %x %x %x\n", hpi6000_adapter_boot_load_dsp()
936 "DSP dram %x %x %x %x\n", hpi6000_adapter_boot_load_dsp()
946 /* write the DSP code down into the DSPs memory */ hpi6000_adapter_boot_load_dsp()
986 /* this time through, assume no errors in DSP code file/array */ hpi6000_adapter_boot_load_dsp()
1007 "DSP verify %x %x %x %x\n", hpi6000_adapter_boot_load_dsp()
1030 /* write the DSP number into the hostmailbox */ hpi6000_adapter_boot_load_dsp()
1031 /* structure before starting the DSP */ hpi6000_adapter_boot_load_dsp()
1034 /* write the DSP adapter Info into the */ hpi6000_adapter_boot_load_dsp()
1035 /* hostmailbox before starting the DSP */ hpi6000_adapter_boot_load_dsp()
1047 * Init could take a while if DSP checks SDRAM memory hpi6000_adapter_boot_load_dsp()
1074 /* read the DSP adapter Info from the */ hpi6000_adapter_boot_load_dsp()
1075 /* hostmailbox structure after starting the DSP */ hpi6000_adapter_boot_load_dsp()
1174 /* take care of errata in revB DSP (2.0.1) */ hpi_read_word()
1179 /* write a block of 32bit words to the DSP HPI port using auto-inc mode */ hpi_write_block()
1193 /* take care of errata in revB DSP (2.0.1) */ hpi_write_block()
1198 /** read a block of 32bit words from the DSP HPI port using auto-inc mode
1213 /* take care of errata in revB DSP (2.0.1) */ hpi_read_block()
1362 /* read the length of the response back from the DSP */ hpi6000_message_response_sequence()
1449 /* DSP returns number of DWORDS */ hpi6000_send_data()
1611 if (hPIC & 0x04) /* 0x04 = HINT from DSP */ hpi6000_wait_dsp_ack()
1631 /* indicates bad read from DSP - hpi6000_wait_dsp_ack()
1717 /** Get dsp index for multi DSP adapters only */ get_dsp_index()
1735 /** Complete transaction with DSP
1752 /* is this checked on the DSP anyway? */ hw_message()
1770 if (error) /* something failed in the HPI/DSP interface */ hw_message()
1773 if (phr->error) /* something failed in the DSP */ hw_message()
H A Dhpidspcd.c4 Functions for reading DSP code using hotplug firmware loader
69 /* Major version change probably means Host-DSP protocol change */ hpi_dsp_code_open()
71 "Incompatible firmware version DSP image %X != Driver %X\n", hpi_dsp_code_open()
78 "Firmware version mismatch: DSP image %X != Driver %X\n", hpi_dsp_code_open()
H A Dhpi6205.c22 TMS320C6205 PCI bus mastering DSP,
23 and (except ASI50xx) TI TMS320C6xxx floating point DSP
72 /* Host-to-DSP Control Register (HDCR) bitfields */
76 /* DSP Page Register (DSPP) bitfields, */
82 * of DSP memory mapped registers (starting at 0x01800000).
255 rmb(); /* make sure we see updates DMAed from DSP */ control_message()
541 /* The C6205 memory area 1 is 8Mbyte window into DSP registers */ create_adapter_obj()
573 HPI_DEBUG_LOG(ERROR, "DSP code load failed\n"); create_adapter_obj()
578 HPI_DEBUG_LOG(INFO, "load DSP code OK\n"); create_adapter_obj()
586 /* make sure the DSP has started ok */ create_adapter_obj()
593 * Allocate bus mastering control cache buffer and tell the DSP about it create_adapter_obj()
676 HPI_DEBUG_LOG(INFO, "bootload DSP OK\n"); create_adapter_obj()
732 /* reset the interrupt from the DSP */ adapter_irq_query_and_clear()
811 /* GRANT phase. Set up the BBM status, tell the DSP about outstream_host_buffer_allocate()
963 * This version relies on the DSP code triggering an OStream buffer outstream_write()
965 * already written data into the BBM buffer, but the DSP won't know outstream_write()
969 /* Format can only change after reset. Must tell DSP. */ outstream_write()
973 hw_message(pao, phm, phr); /* send the format to the DSP */ outstream_write()
1310 /* reset DSP by writing a 1 to the WARMRESET bit */ adapter_boot_load_dsp()
1329 /* try writing a few numbers to the DSP page register */ adapter_boot_load_dsp()
1343 /* reset DSP page to the correct number */ adapter_boot_load_dsp()
1355 /* DSP 1 is a C6713 */ adapter_boot_load_dsp()
1361 /* value of bit 3 is unknown after DSP reset, other bits shoudl be 0 */ adapter_boot_load_dsp()
1376 /* is there a DSP to load? */ adapter_boot_load_dsp()
1396 /* write the DSP code down into the DSPs memory */ adapter_boot_load_dsp()
1488 /* set ack so we know when DSP is ready to go */ adapter_boot_load_dsp()
1496 /* locate the host mailbox on the DSP. */ adapter_boot_load_dsp()
1519 /* give the DSP 10ms to start up */ adapter_boot_load_dsp()
1536 /* DSP 0 is always C6205 */ boot_loader_read_mem32()
1559 /* DSP 1 is a C6713 */ boot_loader_read_mem32()
1578 /* DSP 0 is always C6205 */ boot_loader_write_mem32()
1580 /* BAR1 - DSP register access using */ boot_loader_write_mem32()
1586 /* BAR0 access - all of DSP memory using */ boot_loader_write_mem32()
1601 /* DSP 1 is a C6713 */ boot_loader_write_mem32()
1621 /* DSP 0 is always C6205 */ boot_loader_config_emif()
1684 /* need to use this else DSP code crashes? */ boot_loader_config_emif()
1737 * gives a DSP speed of 189MHz boot_loader_config_emif()
1843 /* DSP 2 is a C6713 */ boot_loader_config_emif()
1914 /* DSP 0 is a C6205 */ boot_loader_test_internal_memory()
1923 /* DSP 1 is a C6713 */ boot_loader_test_internal_memory()
1948 /* DSP 0 is always C6205 */ boot_loader_test_external_memory()
1955 /* DSP 1 is a C6713 */ boot_loader_test_external_memory()
1984 /* DSP 1 is a C6713 */ boot_loader_test_pld()
1999 /** Transfer data to or from DSP
2032 /* DSP must change this back to nOperation */ hpi6205_transfer_data()
2064 /* wait for up to timeout_us microseconds for the DSP
2075 rmb(); /* DSP changes dsp_ack by DMA */ wait_dsp_ack()
2082 /* set the busmaster interface to cmd, then interrupt the DSP */ send_dsp_command()
2089 wmb(); /* DSP gets state by DMA, make sure it is written to memory */ send_dsp_command()
2090 /* before we interrupt the DSP */ send_dsp_command()
2171 /* wait for the DSP to indicate it is idle */ message_response_sequence()
2196 /* something failed in the HPI/DSP interface */ hw_message()
2212 if (phr->error != 0) /* something failed in the DSP */ hw_message()
H A Dhpicmn.h53 /** pointer to DSP's control cache. */
H A Dhpi.h280 /* WARNING types 256 or greater impact bit packing in all AX6 DSP code */
305 This feature is not used by the DSP. In fact the call is completely processed
306 by the driver and is not passed on to the DSP at all.
321 A setting of 0 indicates that no interrupts are being generated. A DSP boot
945 /** DSP code failed to bootload. Usually a DSP memory test failure. */
947 /** Couldn't find or open the DSP code file. */
949 /** Internal DSP hardware error. */
958 /** Found but could not open DSP code file. */
960 /** First DSP code section header not found in DSP file. */
963 /** DSP code for adapter family not found. */
965 /** Other OS specific error opening DSP file. */
967 /** Sharing violation opening DSP code file. */
969 /** DSP code section header had size == 0. */
1079 /** Communication with DSP failed */
H A Dhpi_internal.h121 /* Note Flags >= (1<<8) are for DSP internal use only */
616 u32 pci_address; /**< PCI physical address of buffer for DSP DMA */
626 /* DSP index in to the host bus master buffer. */
800 /* may indicate which DSP the control is located on */
1253 /* declarations for control caching (internal to HPI<->DSP interaction) */
1262 between DSP and host or across a network
1269 /** The original index of the control on the DSP */
1380 /* 2^N sized FIFO buffer (internal to HPI<->DSP interaction) */
1391 /* skip host side function declarations for DSP
/linux-4.1.27/sound/pci/echoaudio/
H A Dechoaudio_dsp.c38 /* Some vector commands involve the DSP reading or writing data to and from the
39 comm page; if you send one of these commands to the DSP, it will complete the
46 /* Wait up to 20ms for the handshake from the DSP */ wait_handshake()
56 dev_err(chip->card->dev, "wait_handshake(): Timeout waiting for DSP\n"); wait_handshake()
62 /* Much of the interaction between the DSP and the driver is done via vector
63 commands; send_vector writes a vector command to the DSP. Typically, this
64 causes the DSP to read or write fields in the comm page.
89 /* write_dsp writes a 32-bit value to the DSP; this is used almost
90 exclusively for loading the DSP. */ write_dsp()
106 chip->bad_board = TRUE; /* Set TRUE until DSP re-loaded */ write_dsp()
113 /* read_dsp reads a 32-bit value from the DSP; this is used almost
114 exclusively for loading the DSP and checking the status of the ASIC. */ read_dsp()
129 chip->bad_board = TRUE; /* Set TRUE until DSP re-loaded */ read_dsp()
140 /* This function is used to read back the serial number from the DSP;
144 part of the DSP load process. */ read_sn()
179 /* Load ASIC code - done after the DSP is loaded */ load_asic_generic()
225 the EPROM on the board for 56301 DSP. The resident loader is a tiny little
226 program that is used to load the real DSP code. */ install_resident_loader()
256 /* The DSP code is an array of 16 bit words. The array is divided up install_resident_loader()
259 Since DSP addresses and data are 24 bits wide, they each take up two install_resident_loader()
264 /* Set DSP format bits for 24 bit mode */ install_resident_loader()
275 /* Skip the section size, LRS block type, and DSP memory type */ install_resident_loader()
278 /* Get the number of DSP words to write */ install_resident_loader()
281 /* Get the DSP address for this block; 24 bits, so build from two words */ install_resident_loader()
285 /* Write the count to the DSP */ install_resident_loader()
291 /* Write the DSP address */ install_resident_loader()
294 "install_resident_loader: Failed to write DSP address!\n"); install_resident_loader()
297 /* Write out this block of code to the DSP */ install_resident_loader()
304 "install_resident_loader: Failed to write DSP code\n"); install_resident_loader()
341 dev_warn(chip->card->dev, "DSP is already loaded!\n"); load_dsp()
344 chip->bad_board = TRUE; /* Set TRUE until DSP loaded */ load_dsp()
345 chip->dsp_code = NULL; /* Current DSP code not loaded */ load_dsp()
346 chip->asic_loaded = FALSE; /* Loading the DSP code will reset the ASIC */ load_dsp()
379 /* Set DSP format bits for 24 bit mode now that soft reset is done */ load_dsp()
413 "load_dsp: failed to write number of DSP words\n"); load_dsp()
418 "load_dsp: failed to write DSP address\n"); load_dsp()
423 "load_dsp: failed to write DSP memory type\n"); load_dsp()
431 "load_dsp: failed to write DSP data\n"); load_dsp()
445 /* Wait for flag 4 - indicates that the DSP loaded OK */ load_dsp()
466 get it as part of the DSP init voodoo. */ load_dsp()
473 chip->dsp_code = code; /* Show which DSP code loaded */ load_dsp()
474 chip->bad_board = FALSE; /* DSP OK */ load_dsp()
481 "load_dsp: DSP load timed out waiting for HF4\n"); load_dsp()
487 /* load_firmware takes care of loading the DSP and any ASIC code. */ load_firmware()
496 /* See if the ASIC is present and working - only if the DSP is already loaded */ load_firmware()
500 /* ASIC check failed; force the DSP to reload */ load_firmware()
587 /* Tell the DSP to read and update output, nominal & monitor levels in comm page. */ update_output_line_level()
598 /* Tell the DSP to read and update input levels in comm page */ update_input_line_level()
609 /* set_meters_on turns the meters on or off. If meters are turned on, the DSP
629 Meters are written in the comm page by the DSP in this order:
946 /* Stops everything and turns off the DSP. All pipes should be already
964 /* Put the DSP to sleep */ rest_in_peace()
984 chip->bad_board = TRUE; /* Set TRUE until DSP loaded */ init_dsp_comm_page()
985 chip->dsp_code = NULL; /* Current DSP code not loaded */ init_dsp_comm_page()
1007 * muted and internal clock source. Then it copies the settings to the DSP.
1008 * This MUST be called after the DSP is up and running !
1031 /* Read the DSP status register and see if this DSP generated this interrupt */ service_irq()
1087 /* The counter register is where the DSP writes the 32 bit DMA allocate_pipes()
1088 position for a pipe. The DSP is constantly updating this value as allocate_pipes()
H A Dmona.c96 {0x1057, 0x1801, 0xECC0, 0x0070, 0, 0, 0}, /* DSP 56301 Mona rev.0 */
97 {0x1057, 0x1801, 0xECC0, 0x0071, 0, 0, 0}, /* DSP 56301 Mona rev.1 */
98 {0x1057, 0x1801, 0xECC0, 0x0072, 0, 0, 0}, /* DSP 56301 Mona rev.2 */
99 {0x1057, 0x3410, 0xECC0, 0x0070, 0, 0, 0}, /* DSP 56361 Mona rev.0 */
100 {0x1057, 0x3410, 0xECC0, 0x0071, 0, 0, 0}, /* DSP 56361 Mona rev.1 */
101 {0x1057, 0x3410, 0xECC0, 0x0072, 0, 0, 0}, /* DSP 56361 Mona rev.2 */
H A Dgina24.c89 {0x1057, 0x1801, 0xECC0, 0x0050, 0, 0, 0}, /* DSP 56301 Gina24 rev.0 */
90 {0x1057, 0x1801, 0xECC0, 0x0051, 0, 0, 0}, /* DSP 56301 Gina24 rev.1 */
91 {0x1057, 0x3410, 0xECC0, 0x0050, 0, 0, 0}, /* DSP 56361 Gina24 rev.0 */
92 {0x1057, 0x3410, 0xECC0, 0x0051, 0, 0, 0}, /* DSP 56361 Gina24 rev.1 */
H A Dechoaudio_dsp.h44 #define DSP_56361 /* Some Echo24 cards use the 56361 DSP */
81 * These are the offsets for the memory-mapped DSP registers; the DSP base
93 * Interesting bits within the DSP registers
108 * DSP commands sent via slave mode; these are sent to the DSP by write_dsp()
165 -Wait for the DSP handshake
183 * DSP vector commands
263 * Clock detect bits reported by the DSP for Gina20, Layla20, Darla24, and Mia
275 * Clock detect bits reported by the DSP for Gina24, Mona, and Layla24
291 * Layla clock numbers to send to DSP
356 * Return values from the DSP when ASIC is loaded
366 * DSP Audio formats
368 * These are the audio formats that the DSP can transfer
559 /* Clock detect bits reported by the DSP */
600 * Defines how much time must pass between DSP load attempts
610 * no longer used, but the sizes must still be right for the DSP to see
625 sg_entry struct is read by the DSP, so all values must be little-endian. */
637 The comm page. This structure is read and written by the DSP; the
638 DSP code is a firm believer in the byte offsets written in the comments
650 u32 handshake; /* DSP command handshake 0x010 4 */
H A Dmia_dsp.c49 "init_hw - could not initialize DSP comm page\n"); init_hw()
85 /* Map the DSP clock detect bits to the generic driver clock detect_input_clocks()
142 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ set_sample_rate()
191 /* Tell the DSP to read and update virtual mixer levels in comm page. */ update_vmixer_level()
202 /* Tell the DSP to reread the flags from the comm page */ update_flags()
H A Ddarla24_dsp.c41 "init_hw: could not initialize DSP comm page\n"); init_hw()
75 /* Map the DSP clock detect bits to the generic driver clock detect_input_clocks()
147 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP ? */ set_sample_rate()
H A Dindigo_dsp.c46 "init_hw - could not initialize DSP comm page\n"); init_hw()
121 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ set_sample_rate()
157 /* Tell the DSP to read and update virtual mixer levels in comm page. */ update_vmixer_level()
H A Dindigodj_dsp.c46 "init_hw - could not initialize DSP comm page\n"); init_hw()
121 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ set_sample_rate()
157 /* Tell the DSP to read and update virtual mixer levels in comm page. */ update_vmixer_level()
H A Ddarla24.c71 {0x1057, 0x1801, 0xECC0, 0x0040, 0, 0, 0}, /* DSP 56301 Darla24 rev.0 */
72 {0x1057, 0x1801, 0xECC0, 0x0041, 0, 0, 0}, /* DSP 56301 Darla24 rev.1 */
H A Dlayla20.c80 {0x1057, 0x1801, 0xECC0, 0x0030, 0, 0, 0}, /* DSP 56301 Layla20 rev.0 */
81 {0x1057, 0x1801, 0xECC0, 0x0031, 0, 0, 0}, /* DSP 56301 Layla20 rev.1 */
H A Dmia.c81 {0x1057, 0x3410, 0xECC0, 0x0080, 0, 0, 0}, /* DSP 56361 Mia rev.0 */
82 {0x1057, 0x3410, 0xECC0, 0x0081, 0, 0, 0}, /* DSP 56361 Mia rev.1 */
H A Dmidi.c58 /* Send a buffer full of MIDI data to the DSP
85 this state machine to parse the incoming MIDI data stream. Every time the DSP
86 sees a 0xF1 byte come in, it adds the DSP sample position to the MIDI data
87 stream. The DSP sample position is represented as a 32 bit unsigned value,
115 from the DSP's buffer. It returns the number of bytes received. */ midi_service_irq()
229 /* Buffer is full. DSP's internal buffer is 64 (128 ?) snd_echo_midi_output_write()
H A Dechoaudio_3g.c72 register. write_control_reg sends the new control register value to the DSP. */ write_control_reg()
117 * updated by the DSP comm object. */ set_digital_mode()
195 /* Map the DSP clock detect bits to the generic driver clock detect_input_clocks()
228 /* Give the DSP a few milliseconds to settle down */ load_asic()
315 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ set_sample_rate()
320 /* Tell the DSP about it - DSP reads both control reg & freq reg */ set_sample_rate()
H A Dechoaudio_gml.c46 /* The DSP will return a value to indicate whether or not the check_asic_status()
63 value to the DSP. */ write_control_reg()
89 input auto-mute is enabled, the DSP will only enable the digital inputs if
100 the auto-mute flag to be sent to the DSP */ set_input_auto_mute()
127 updated by the DSP comm object. */ set_digital_mode()
H A Dgina20_dsp.c45 "init_hw - could not initialize DSP comm page\n"); init_hw()
82 /* Map the DSP clock detect bits to the generic driver clock detect_input_clocks()
194 /* Tell the DSP to reread the flags from the comm page */ update_flags()
H A Decho3g_dsp.c54 "init_hw - could not initialize DSP comm page\n"); init_hw()
66 /* Load the DSP code and the ASIC on the PCI card and get init_hw()
H A Dindigoio_dsp.c46 "init_hw - could not initialize DSP comm page\n"); init_hw()
127 /* Tell the DSP to read and update virtual mixer levels in comm page. */ update_vmixer_level()
H A Dgina24_dsp.c49 "init_hw - could not initialize DSP comm page\n"); init_hw()
100 /* Map the DSP clock detect bits to the generic driver clock detect_input_clocks()
131 /* Give the DSP a few milliseconds to settle down */ load_asic()
225 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ set_sample_rate()
H A Dlayla20_dsp.c48 "init_hw - could not initialize DSP comm page\n"); init_hw()
84 /* Map the DSP clock detect bits to the generic driver clock detect bits */ detect_input_clocks()
120 /* The DSP will return a value to indicate whether or not check_asic_status()
268 /* Tell the DSP to reread the flags from the comm page */ update_flags()
H A Dlayla24_dsp.c48 "init_hw - could not initialize DSP comm page\n"); init_hw()
91 /* Map the DSP clock detect bits to the generic driver clock detect bits */ detect_input_clocks()
120 /* Give the DSP a few milliseconds to settle down */ load_asic()
239 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP ? */ set_sample_rate()
H A Ddarla20.c67 {0x1057, 0x1801, 0xECC0, 0x0010, 0, 0, 0}, /* DSP 56301 Darla20 rev.0 */
H A Dgina20.c71 {0x1057, 0x1801, 0xECC0, 0x0020, 0, 0, 0}, /* DSP 56301 Gina20 rev.0 */
H A Dindigodjx_dsp.c44 "init_hw - could not initialize DSP comm page\n"); init_hw()
H A Dindigoiox_dsp.c44 "init_hw - could not initialize DSP comm page\n"); init_hw()
H A Dechoaudio.h364 * seen by DSP
382 char bad_board; /* Set TRUE if DSP won't load */
415 u16 *dsp_code; /* Current DSP code loaded,
417 short dsp_code_to_load; /* DSP code to load */
420 * memory seen by DSP */
421 volatile u32 __iomem *dsp_registers; /* DSP's register base */
H A Dmona_dsp.c49 "init_hw - could not initialize DSP comm page\n"); init_hw()
93 /* Map the DSP clock detect bits to the generic driver clock detect_input_clocks()
288 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ set_sample_rate()
H A Ddarla20_dsp.c41 "init_hw: could not initialize DSP comm page\n"); init_hw()
H A Dindigo_express_dsp.c100 /* Tell the DSP to read and update virtual mixer levels in comm page. */ update_vmixer_level()
H A Dlayla24.c91 {0x1057, 0x3410, 0xECC0, 0x0060, 0, 0, 0}, /* DSP 56361 Layla24 rev.0 */
/linux-4.1.27/include/sound/
H A Dcompress_driver.h40 * @ops: pointer to DSP callbacks
42 * DSP doesn't implement copy
48 * @total_bytes_transferred: cumulative bytes transferred by offload DSP
68 * @ops: pointer to DSP callbacks
74 * @private_data: pointer to DSP private data
88 * struct snd_compr_ops: compressed path DSP operations
103 * Can't be implemented if DSP supports mmap
104 * @mmap: DSP mmap method to mmap DSP memory
105 * @ack: Ack for DSP when data is written to audio buffer, Optional
107 * @get_caps: Retrieve DSP capabilities, mandatory
137 * @name: DSP device name
139 * @ops: pointer to DSP callbacks
140 * @private_data: pointer to DSP pvt data
H A Dwm0010.h2 * wm0010.h -- Platform data for WM0010 DSP Driver
H A Dsb.h66 unsigned long port; /* base port of DSP chip */
68 unsigned long mpu_port; /* MPU port for SB DSP 4.0+ */
69 int irq; /* IRQ number of DSP chip */
72 unsigned short version; /* version of DSP chip */
H A Dsb16_csp.h59 struct snd_sb *chip; /* SB16 DSP */
H A Dcs4231-regs.h167 #define CS4236_LEFT_DSP 0x88 /* left DSP serial port volume */
168 #define CS4236_RIGHT_DSP 0x98 /* right DSP serial port volume */
/linux-4.1.27/sound/soc/intel/common/
H A Dsst-dsp-priv.h33 * DSP Operations exported by platform Audio DSP driver.
36 /* DSP core boot / reset */
49 /* DSP I/DRAM IO */
69 * Audio DSP memory offsets and addresses.
85 * Audio DSP Mailbox configuration.
95 * Audio DSP memory block types.
105 * Audio DSP Generic Firmware File.
120 struct list_head list; /* DSP list of FW */
127 * Audio DSP Generic Module Template.
140 * Block Allocator - Used to allocate blocks of DSP memory.
151 * times within the DSP FW.
176 * Audio DSP Module State
186 * Audio DSP Generic Module.
190 * can be instanciated multiple times in the DSP.
213 struct list_head list; /* DSP list of modules */
264 struct mutex mutex; /* DSP FW lock */
H A Dsst-ipc.c61 /* wait for DSP completion (in all cases atm inc pending) */ tx_wait_done()
74 /* copy the data returned from DSP */ tx_wait_done()
154 /* if the DSP is busy, we will TX messages after IRQ. ipc_tx_msgs()
230 /* drop all TX and Rx messages before we stall + reset DSP */ sst_ipc_drop_all()
H A Dsst-firmware.c96 /* copy to DSP */ sst_dsp_dma_copyto()
105 /* copy from DSP */ sst_dsp_dma_copyfrom()
369 /* call core specific FW paser to load FW data into DSP */ sst_fw_new()
405 /* call core specific FW paser to load FW data into DSP */ sst_fw_reload()
616 /* allocate first free DSP blocks for data - callers hold locks */ block_alloc()
685 /* prepare DSP blocks for module usage */ sst_alloc_blocks()
786 /* Load fixed module data into DSP memory blocks */ sst_module_alloc_blocks()
814 /* prepare DSP blocks for module copy */ sst_module_alloc_blocks()
845 /* Unload entire module from DSP memory */ sst_module_free_blocks()
901 /* prepare DSP blocks for module copy */ sst_module_runtime_alloc_blocks()
1021 /* register a DSP memory block for use with FW based modules */ sst_mem_block_register()
1048 /* unregister all DSP memory blocks */ sst_mem_block_unregister_all()
1190 /* returns block address in DSP address space */ sst_dsp_get_offset()
H A Dsst-dsp.c2 * Intel Smart Sound Technology (SST) DSP Core Driver
358 dev_dbg(dev, "initialising audio DSP id 0x%x\n", pdata->id); sst_dsp_new()
380 /* Initialise SST Audio DSP */ sst_dsp_new()
H A Dsst-dsp.h214 /* DSP */
254 /* DSP reset & boot */
/linux-4.1.27/drivers/remoteproc/
H A Dda8xx_remoteproc.c29 "\n\t\tName of DSP firmware file in /lib/firmware"
45 * @dsp_clk: placeholder for platform's DSP clk
48 * @chipsig: virt ptr to DSP interrupt registers (CHIPSIG & CHIPSIG_CLR)
49 * @bootreg: virt ptr to DSP boot address register (HOST1CFG)
83 * core (DSP) has modified the state of a virtqueue. There is no
103 * this function, but since the ARM<->DSP interrupts in the da8xx_rproc_callback()
241 * rproc_add() can end up enabling the DSP's clk with the DSP da8xx_rproc_probe()
242 * *not* in reset, but da8xx_rproc_start() needs the DSP to be da8xx_rproc_probe()
277 * It's important to place the DSP in reset before going away, da8xx_rproc_remove()
278 * since a subsequent insmod of this module may enable the DSP's da8xx_rproc_remove()
280 * before this module's probe has had a chance to reset the DSP. da8xx_rproc_remove()
281 * Without the reset, the DSP can lockup permanently when it da8xx_rproc_remove()
/linux-4.1.27/arch/sh/include/uapi/asm/
H A Dcpu-features.h18 #define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */
H A Dptrace.h19 #define PTRACE_GETDSPREGS 55 /* DSP registers */
H A Dptrace_32.h56 * This struct defines the way the DSP registers are stored on the
/linux-4.1.27/drivers/staging/ft1000/
H A Dft1000.h91 #define FT1000_FIFO_LEN 0x07FC /* total length for DSP FIFO tracking */
97 #define FT1000_DSP_CON_STATE 0x0FF8 /* DSP Connection Status Info */
112 #define FT1000_MAG_FIFO_LEN 0x1FF /* total length for DSP
124 #define FT1000_MAG_DSP_CON_STATE 0x3FE /* DSP Connection Status Info */
125 #define FT1000_MAG_DSP_CON_STATE_INDX 0x1 /* DSP Connection Status Info */
159 #define FT1000_DB_DPRAM_RX 0x0001 /* this value indicates that DSP
163 #define FT1000_ASIC_RESET_REQ 0x0004 /* DSP requesting host to
166 #define FT1000_DSP_ASIC_RESET 0x0008 /* DSP indicating host that
169 #define FT1000_DB_COND_RESET 0x0010 /* DSP request for a card reset. */
173 * has data for DSP in DPRAM.
178 * heartbeat message for DSP.
195 #define ISR_DOORBELL_ACK 0x01 /* Doorbell acknowledge from DSP */
196 #define ISR_DOORBELL_PEND 0x02 /* Doorbell pending from DSP */
256 /* Driver Error Messages for DSP */
321 u8 DspVer[DSPVERSZ]; /* DSP version number */
346 u8 DspVer[DSPVERSZ]; /* DSP version number */
/linux-4.1.27/sound/pci/emu10k1/
H A Demumixer.c108 "DSP 0",
109 "DSP 1",
110 "DSP 2",
111 "DSP 3",
112 "DSP 4",
113 "DSP 5",
114 "DSP 6",
115 "DSP 7",
116 "DSP 8",
117 "DSP 9",
118 "DSP 10",
119 "DSP 11",
120 "DSP 12",
121 "DSP 13",
122 "DSP 14",
123 "DSP 15",
124 "DSP 16",
125 "DSP 17",
126 "DSP 18",
127 "DSP 19",
128 "DSP 20",
129 "DSP 21",
130 "DSP 22",
131 "DSP 23",
132 "DSP 24",
133 "DSP 25",
134 "DSP 26",
135 "DSP 27",
136 "DSP 28",
137 "DSP 29",
138 "DSP 30",
139 "DSP 31",
162 "DSP 0",
163 "DSP 1",
164 "DSP 2",
165 "DSP 3",
166 "DSP 4",
167 "DSP 5",
168 "DSP 6",
169 "DSP 7",
170 "DSP 8",
171 "DSP 9",
172 "DSP 10",
173 "DSP 11",
174 "DSP 12",
175 "DSP 13",
176 "DSP 14",
177 "DSP 15",
178 "DSP 16",
179 "DSP 17",
180 "DSP 18",
181 "DSP 19",
182 "DSP 20",
183 "DSP 21",
184 "DSP 22",
185 "DSP 23",
186 "DSP 24",
187 "DSP 25",
188 "DSP 26",
189 "DSP 27",
190 "DSP 28",
191 "DSP 29",
192 "DSP 30",
193 "DSP 31",
563 EMU1010_SOURCE_INPUT("DSP 0 Capture Enum", 0),
564 EMU1010_SOURCE_INPUT("DSP 1 Capture Enum", 1),
565 EMU1010_SOURCE_INPUT("DSP 2 Capture Enum", 2),
566 EMU1010_SOURCE_INPUT("DSP 3 Capture Enum", 3),
567 EMU1010_SOURCE_INPUT("DSP 4 Capture Enum", 4),
568 EMU1010_SOURCE_INPUT("DSP 5 Capture Enum", 5),
569 EMU1010_SOURCE_INPUT("DSP 6 Capture Enum", 6),
570 EMU1010_SOURCE_INPUT("DSP 7 Capture Enum", 7),
571 EMU1010_SOURCE_INPUT("DSP 8 Capture Enum", 8),
572 EMU1010_SOURCE_INPUT("DSP 9 Capture Enum", 9),
573 EMU1010_SOURCE_INPUT("DSP A Capture Enum", 0xa),
574 EMU1010_SOURCE_INPUT("DSP B Capture Enum", 0xb),
575 EMU1010_SOURCE_INPUT("DSP C Capture Enum", 0xc),
576 EMU1010_SOURCE_INPUT("DSP D Capture Enum", 0xd),
577 EMU1010_SOURCE_INPUT("DSP E Capture Enum", 0xe),
578 EMU1010_SOURCE_INPUT("DSP F Capture Enum", 0xf),
579 EMU1010_SOURCE_INPUT("DSP 10 Capture Enum", 0x10),
580 EMU1010_SOURCE_INPUT("DSP 11 Capture Enum", 0x11),
581 EMU1010_SOURCE_INPUT("DSP 12 Capture Enum", 0x12),
582 EMU1010_SOURCE_INPUT("DSP 13 Capture Enum", 0x13),
583 EMU1010_SOURCE_INPUT("DSP 14 Capture Enum", 0x14),
584 EMU1010_SOURCE_INPUT("DSP 15 Capture Enum", 0x15),
/linux-4.1.27/arch/mips/kernel/
H A Dpm.c26 * Ensures that general CPU context is saved, notably FPU and DSP.
33 /* Save DSP state */ mips_cpu_save()
51 /* Restore DSP state */ mips_cpu_restore()
H A DMakefile111 # DSP ASE supported for MIPS32 or MIPS64 Release 2 cores only. It is not
113 # here because the compiler may use DSP ASE instructions (such as lwx) in
/linux-4.1.27/sound/soc/samsung/
H A Dbells.c232 .name = "CPU-DSP",
233 .stream_name = "CPU-DSP",
242 .name = "DSP-CODEC",
243 .stream_name = "DSP-CODEC",
256 .name = "CPU-DSP",
257 .stream_name = "CPU-DSP",
266 .name = "DSP-CODEC",
267 .stream_name = "DSP-CODEC",
302 .name = "CPU-DSP",
303 .stream_name = "CPU-DSP",
312 .name = "DSP-CODEC",
313 .stream_name = "DSP-CODEC",
H A Dspeyside.c191 .name = "CPU-DSP",
192 .stream_name = "CPU-DSP",
202 .name = "DSP-CODEC",
203 .stream_name = "DSP-CODEC",
/linux-4.1.27/include/uapi/sound/
H A Dcompress_offload.h58 * @byte_offset: Byte offset in ring buffer to DSP
59 * @copied_total: Total number of bytes copied from/to ring buffer to/by DSP
60 * @pcm_frames: Frames decoded or encoded by DSP. This field will evolve by
63 * @pcm_io_frames: Frames rendered or received by DSP into a mixer or an audio
94 * @min_fragment_size: minimum fragment supported by DSP
95 * @max_fragment_size: maximum fragment supported by DSP
96 * @min_fragments: min fragments supported by DSP
97 * @max_fragments: max fragments supported by DSP
148 * SNDRV_COMPRESS_GET_CAPS: Query capability of DSP
160 * and the buffers currently with DSP
H A Dsb16_csp.h28 #define SNDRV_SB_CSP_MODE_DSP_READ 0x01 /* Record from DSP */
29 #define SNDRV_SB_CSP_MODE_DSP_WRITE 0x02 /* Play to DSP */
/linux-4.1.27/arch/sh/kernel/cpu/
H A Dinit.c237 /* Clear SR.DSP bit */ release_dsp()
252 * Set the SR.DSP bit, wait for one instruction, and then read dsp_init()
265 /* If the DSP bit is still set, this CPU has a DSP */ dsp_init()
269 /* Disable the DSP */ dsp_init()
271 printk("DSP Disabled\n"); dsp_init()
275 /* Now that we've determined the DSP status, clear the DSP bit. */ dsp_init()
291 * the caches, FPU, DSP, etc. By the time start_kernel() is hit (and dsp_init()
/linux-4.1.27/arch/arm/kernel/
H A Dxscale-cp0.c4 * XScale DSP and iWMMXt coprocessor context switching and handling
125 * This sequence is interpreted by the DSP coprocessor as: cpu_has_iwmmxt()
147 * hand the CPU has a DSP coprocessor, we keep access to CP0 enabled
167 pr_info("XScale DSP coprocessor detected.\n"); xscale_cp0_init()
/linux-4.1.27/drivers/staging/ft1000/ft1000-usb/
H A Dft1000_download.c29 #define HANDSHAKE_RESET_VALUE 0xFEFE /* When DSP requests startover */
30 #define HANDSHAKE_RESET_VALUE_USB 0xFE7E /* When DSP requests startover */
31 #define HANDSHAKE_DSP_BL_READY 0xFEFE /* At start DSP writes this when bootloader ready */
32 #define HANDSHAKE_DSP_BL_READY_USB 0xFE7E /* At start DSP writes this when bootloader ready */
34 #define HANDSHAKE_SEND_DATA 0x0000 /* DSP writes this when ready for more data */
36 #define HANDSHAKE_REQUEST 0x0001 /* Request from DSP */
37 #define HANDSHAKE_RESPONSE 0x0000 /* Satisfied DSP request */
66 #define HANDSHAKE_MAG_DSP_BL_READY 0xFEFE0000 /* At start DSP writes this when bootloader ready */
72 #define HANDSHAKE_MAG_DRV_DATA 0x02FECDAB /* Driver writes this to indicate data available to DSP */
73 #define HANDSHAKE_MAG_DRV_ENTRY 0x01FECDAB /* Driver writes this to indicate entry point to DSP */
95 long nDspImages; /* Number of DSP images in file. */
100 long coff_date; /* Date/time when DSP Coff image was built. */
103 long run_address; /* On chip Start address of DSP code. */
105 long version; /* Embedded version # of DSP code. */
106 unsigned short checksum; /* DSP File checksum */
441 /* writes a block of DSP image to DPRAM
443 * u16 **pUsFile - DSP image file pointer in u16
444 * u8 **pUcFile - DSP image file pointer in u8
515 /* writes a block of DSP image to DPRAM
517 * u16 **pUsFile - DSP image file pointer in u16
518 * u8 **pUcFile - DSP image file pointer in u8
H A Dft1000_usb.h15 u32 nTxMsg; /* DPRAM msg sent to DSP with app_id */
17 u32 nTxMsgReject; /* DPRAM msg rejected due to DSP doorbell
50 #define FT1000_MAG_DSP_CON_STATE_INDX 0x0 /* DSP Connection Status Info */
H A Dft1000_hw.c284 /* reset or activate the DSP */ card_reset_dsp()
296 pr_debug("Reset DSP\n"); card_reset_dsp()
303 pr_debug("Activate DSP\n"); card_reset_dsp()
373 /* load or reload the DSP */ dsp_reload()
396 /* Toggle DSP reset */ dsp_reload()
430 * ASIC and DSP. ft1000_reset_asic()
478 /* Initialize DSP heartbeat area */ ft1000_reset_card()
1048 pr_debug("DSP Provisioning List Entry\n"); ft1000_dsp_prov()
1071 pr_debug("*** Provision Data Sent to DSP\n"); ft1000_dsp_prov()
1110 pr_debug("DSP Provisioning List Entry finished\n"); ft1000_dsp_prov()
1218 * Send provisioning data to DSP ft1000_proc_drvmsg()
1229 pr_debug("No more DSP provisioning data in dsp image\n"); ft1000_proc_drvmsg()
1231 pr_debug("DSP PROVISION is done\n"); ft1000_proc_drvmsg()
1537 /* clear ASIC reset request from DSP */ ft1000_poll()
1548 /* ring doorbell to tell DSP that ft1000_poll()
1557 /* Reset ASIC and DSP */ ft1000_poll()
1576 pr_debug("DSP conditional reset requested\n"); ft1000_poll()
H A Dft1000_ioctl.h37 unsigned char DspVer[DSPVERSZ]; /* DSP version number */
H A Dft1000_debug.c387 /* pr_debug("Polling for data from DSP\n"); */ ft1000_poll_dev()
598 /* Suspend for 2ms and try again due to DSP doorbell busy */ ft1000_ioctl()
602 /* Suspend for 1ms and try again due to DSP doorbell busy */ ft1000_ioctl()
608 /* Suspend for 3ms and try again due to DSP doorbell busy */ ft1000_ioctl()
H A Dft1000_usb.c168 "Problem with DSP image loading\n"); ft1000_probe()
/linux-4.1.27/sound/soc/codecs/
H A Dadau1373.c669 SOC_DAPM_SINGLE("DSP Channel5 Switch", _reg, 4, 1, 0), \
670 SOC_DAPM_SINGLE("DSP Channel4 Switch", _reg, 3, 1, 0), \
671 SOC_DAPM_SINGLE("DSP Channel3 Switch", _reg, 2, 1, 0), \
672 SOC_DAPM_SINGLE("DSP Channel2 Switch", _reg, 1, 1, 0), \
673 SOC_DAPM_SINGLE("DSP Channel1 Switch", _reg, 0, 1, 0), \
765 SOC_MIXER_ARRAY("DSP Channel1 Mixer", SND_SOC_NOPM, 0, 0,
767 SOC_MIXER_ARRAY("DSP Channel2 Mixer", SND_SOC_NOPM, 0, 0,
769 SOC_MIXER_ARRAY("DSP Channel3 Mixer", SND_SOC_NOPM, 0, 0,
771 SOC_MIXER_ARRAY("DSP Channel4 Mixer", SND_SOC_NOPM, 0, 0,
773 SOC_MIXER_ARRAY("DSP Channel5 Mixer", SND_SOC_NOPM, 0, 0,
787 SND_SOC_DAPM_SUPPLY("DSP", ADAU1373_DIGEN, 4, 0, NULL, 0),
866 { _sink, "DSP Channel1 Switch", "DSP Channel1 Mixer" }, \
867 { _sink, "DSP Channel2 Switch", "DSP Channel2 Mixer" }, \
868 { _sink, "DSP Channel3 Switch", "DSP Channel3 Mixer" }, \
869 { _sink, "DSP Channel4 Switch", "DSP Channel4 Mixer" }, \
870 { _sink, "DSP Channel5 Switch", "DSP Channel5 Mixer" }
912 DSP_CHANNEL_MIXER_ROUTES("DSP Channel1 Mixer"),
913 DSP_CHANNEL_MIXER_ROUTES("DSP Channel2 Mixer"),
914 DSP_CHANNEL_MIXER_ROUTES("DSP Channel3 Mixer"),
915 DSP_CHANNEL_MIXER_ROUTES("DSP Channel4 Mixer"),
916 DSP_CHANNEL_MIXER_ROUTES("DSP Channel5 Mixer"),
993 { "DSP", NULL, "SYSCLK1" },
995 { "AIF1 Mixer", NULL, "DSP" },
996 { "AIF2 Mixer", NULL, "DSP" },
997 { "AIF3 Mixer", NULL, "DSP" },
998 { "DAC1 Mixer", NULL, "DSP" },
999 { "DAC2 Mixer", NULL, "DSP" },
H A Drt5670-dsp.h2 * rt5670-dsp.h -- RT5670 ALSA SoC DSP driver
21 /* DSP Control 1 (0xe0) */
H A Dadau17x1.c149 * The MUX register for the Capture and Playback MUXs selects either DSP as
151 * snd_soc_dai_set_tdm_slot(), so we only expose whether to go to the DSP or
232 "DSP",
237 "DSP",
248 SND_SOC_DAPM_PGA("DSP", ADAU17X1_DSP_RUN, 0, 0, NULL, 0),
249 SND_SOC_DAPM_SIGGEN("DSP Siggen"),
258 { "DAC Playback Mux", "DSP", "DSP" },
268 { "Capture Mux", "DSP", "DSP" },
274 { "DSP", NULL, "DSP Siggen" },
276 { "DSP", NULL, "Left Decimator" },
277 { "DSP", NULL, "Right Decimator" },
H A Dwm0010.c2 * wm0010.c -- WM0010 DSP Driver
397 /* Check it's a DSP file */ wm0010_firmware_load()
591 dev_warn(wm0010->dev, "DSP already powered up!\n"); wm0010_boot()
595 dev_err(codec->dev, "Max DSP clock frequency is 26MHz\n"); wm0010_boot()
636 dev_err(codec->dev, "Failed to get interrupt from DSP\n"); wm0010_boot()
648 dev_err(codec->dev, "Failed to get interrupt from DSP loader.\n"); wm0010_boot()
705 /* Look for PLL active code from the DSP */ wm0010_boot()
718 dev_dbg(codec->dev, "Not enabling DSP PLL."); wm0010_boot()
940 "Failed to request GPIO for DSP reset: %d\n", wm0010_spi_probe()
H A Dwm8958-dsp2.c201 /* If the DSP is already running then noop */ wm8958_dsp_start_mbc()
227 /* Run the DSP */ wm8958_dsp_start_mbc()
277 /* Run the DSP */ wm8958_dsp_start_vss()
294 /* Switch the DSP into the data path */ wm8958_dsp_start_vss()
321 /* Run the DSP */ wm8958_dsp_start_enh_eq()
325 /* Switch the DSP into the data path */ wm8958_dsp_start_enh_eq()
364 dev_dbg(codec->dev, "DSP path %d %d startup: %d, power: %x, DSP: %x\n", wm8958_dsp_apply()
368 /* If the DSP is already running then noop */ wm8958_dsp_apply()
395 dev_dbg(codec->dev, "DSP running in path %d\n", path); wm8958_dsp_apply()
399 /* If the DSP is already stopped then noop */ wm8958_dsp_apply()
414 dev_dbg(codec->dev, "DSP stopped\n"); wm8958_dsp_apply()
H A Drt5677.h233 /* Virtual DSP Mixer Control */
243 /* DSP Mode I2C Control*/
397 /* IF/DSP to DAC3/4 Mixer Control (0x16) */
439 /* IF/DSP to DAC2 Mixer Control (0x1b) */
605 /* ADC/IF/DSP to DAC1 Mixer control (0x29) */
1100 /* Power Management for DSP (0x65) */
1124 /* Power Status for DSP (0x66) */
1146 /* Power Management for DSP (0x67) */
1453 /* DSP InBound Control (0xa3) */
1463 /* DSP InBound Control (0xa4) */
1471 /* DSP In/OutBound Control (0xa5) */
1629 /* Virtual DSP Mixer Control (0xf7 0xf8 0xf9) */
H A Dwm_adsp.c40 dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
42 dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
44 dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
46 dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
48 dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
611 WARN(1, "Unknown DSP type"); wm_adsp_load()
816 snprintf(name, PAGE_SIZE, "DSP%d %s %x", wm_adsp_create_control()
1001 WARN(1, "Unknown DSP type"); wm_adsp_setup_algs()
1385 * For simplicity set the DSP clock rate to be the wm_adsp1_event()
1497 adsp_err(dsp, "Failed to start DSP RAM\n"); wm_adsp2_ena()
1515 * For simplicity set the DSP clock rate to be the wm_adsp2_boot_work()
1702 * Disable the DSP memory by default when in reset for a small wm_adsp2_init()
H A Drt5670.c1118 "DSP", "Bypass"
1125 SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum);
1131 SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum);
1548 SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2,
1722 /* DSP */
1731 SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0,
1733 SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0,
1783 /* Audio DSP */
1784 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
2120 { "DSP UL Mux", "Bypass", "TDM Data Mux" },
2121 { "DSP UL Mux", NULL, "I2S DSP" },
2122 { "DSP DL Mux", "Bypass", "RxDP Mux" },
2123 { "DSP DL Mux", NULL, "I2S DSP" },
2125 { "TxDP_ADC_L", NULL, "DSP UL Mux" },
2126 { "TxDP_ADC_R", NULL, "DSP UL Mux" },
2127 { "TxDC_DAC", NULL, "DSP DL Mux" },
2190 { "Audio DSP", NULL, "DAC1 MIXL" },
2191 { "Audio DSP", NULL, "DAC1 MIXR" },
H A Dsigmadsp.c728 * sigmadsp_setup() - Setup the DSP for the specified samplerate
730 * @samplerate: The samplerate the DSP should be configured for
776 * sigmadsp_reset() - Notify the sigmadsp instance that the DSP has been reset
779 * Should be called whenever the DSP has been reset and parameter and program
794 * sigmadsp_restrict_params() - Applies DSP firmware specific constraints
H A Dml26124.h65 /* DSP Control Register */
/linux-4.1.27/arch/mips/bcm63xx/
H A Ddev-dsp.c2 * Broadcom BCM63xx VoIP DSP registration
/linux-4.1.27/arch/mips/include/asm/mach-bcm63xx/
H A Dboard_bcm963xx.h45 /* DSP config */
/linux-4.1.27/sound/drivers/vx/
H A Dvx_cmd.h4 * Definitions of DSP commands
98 /* Family and code op of some DSP requests. */
134 /* DSP commands general masks */
196 * high word out of the 2 returned by the DSP
H A Dvx_core.c180 /* If status given by DSP, let's decode its size */ vx_read_status()
233 * vx_send_msg_nolock - send a DSP message and read back the status
340 * vx_send_msg - send a DSP message with mutex
366 * unlike RMH, no command is sent to DSP.
511 printk(KERN_ERR "DSP Stream underrun ! IRQ events = 0x%x\n", events); snd_vx_threaded_irq_handler()
515 /* We must prevent any application using this DSP snd_vx_threaded_irq_handler()
517 * either unregisters or reloads the DSP snd_vx_threaded_irq_handler()
520 snd_printk(KERN_ERR "vx_core: fatal DSP error!!\n"); snd_vx_threaded_irq_handler()
583 /* Reset the DSP */ vx_reset_board()
615 snd_iprintf(buffer, "DSP audio info:"); vx_proc_read()
654 * snd_vx_dsp_boot - load the DSP boot
676 * snd_vx_dsp_load - load the DSP image
692 /* Transfert data buffer from PC to DSP */ snd_vx_dsp_load()
695 /* Wait DSP ready for a new read */ snd_vx_dsp_load()
761 snd_printk(KERN_ERR "vx: firmware resume error at DSP %d\n", i); snd_vx_resume()
H A Dvx_cmd.c4 * DSP commands
29 * Array of DSP commands
H A Dvx_uer.c31 * @sync: DSP needs to resynchronize its FIFO
38 /* Ask the DSP to resynchronize its FIFO. */ vx_modify_board_clock()
302 * The frequency computed by the DSP is good and vx_change_frequency()
H A Dvx_hwdep.c4 * DSP firmware management
/linux-4.1.27/drivers/staging/ft1000/ft1000-pcmcia/
H A Dft1000_dnld.c18 Description: This module will handshake with the DSP bootloader to
19 download the DSP runtime image.
59 #define HANDSHAKE_RESET_VALUE 0xFEFE /* When DSP requests startover */
60 #define HANDSHAKE_DSP_BL_READY 0xFEFE /* At start DSP writes this when bootloader ready */
62 #define HANDSHAKE_SEND_DATA 0x0000 /* DSP writes this when ready for more data */
64 #define HANDSHAKE_REQUEST 0x0001 /* Request from DSP */
65 #define HANDSHAKE_RESPONSE 0x0000 /* Satisfied DSP request */
103 u32 nDspImages; /* Number of DSP images in file. */
107 u32 coff_date; /* Date/time when DSP Coff image was built. */
110 u32 run_address; /* On chip Start address of DSP code. */
112 u32 version; /* Embedded version # of DSP code. */
H A Dft1000_hw.c307 Description: This function reads the DSP timer and stores its value in the
361 * ASIC and DSP. ft1000_reset_asic()
420 pr_debug("resetting DSP\n"); ft1000_reset_card()
423 pr_debug("resetting ASIC and DSP\n"); ft1000_reset_card()
428 /* Copy DSP session record into info block if this is not a coldstart */ ft1000_reset_card()
460 pr_debug("Put DSP in reset and take ASIC out of reset\n"); ft1000_reset_card()
468 /* Take DSP out of reset */ ft1000_reset_card()
472 pr_debug("Take DSP out of reset\n"); ft1000_reset_card()
488 pr_debug("No FEFE detected from DSP\n"); ft1000_reset_card()
493 /* Take DSP out of reset */ ft1000_reset_card()
509 * to sync up with the DSP ft1000_reset_card()
513 /* Initialize DSP heartbeat area to ho */ ft1000_reset_card()
518 /* Initialize DSP heartbeat area to ho */ ft1000_reset_card()
580 Description: This function will perform the heart beat check of the DSP as
788 /* ring doorbell to notify DSP that we have a message ready */ ft1000_send_cmd()
931 pr_debug("Got a provisioning request message from DSP\n"); ft1000_proc_drvmsg()
1175 Description: This function will parse the message received from the DSP
1198 /* Copy DSP session record from info block */ ft1000_parse_dpram_msg()
1274 * DSP at a time. ft1000_parse_dpram_msg()
1283 /* Reset ASIC and DSP */ ft1000_parse_dpram_msg()
1286 pr_debug("DSP conditional reset requested\n"); ft1000_parse_dpram_msg()
1291 /* let's clear any unexpected doorbells from DSP */ ft1000_parse_dpram_msg()
1386 /* Update FIFO counter for DSP */ ft1000_flush_fifo()
1749 /* schedule ft1000_hbchk to perform periodic heartbeat checks on DSP ft1000_open()
/linux-4.1.27/firmware/dsp56k/
H A Dbootstrap.asm38 ; ; Zero 16384 DSP X and Y words
51 ; Copy DSP program control
/linux-4.1.27/sound/isa/
H A Dsc6000.c3 * Audio Excel DSP 16 or Zoltrix AV302.
46 "{AudioExcel, Audio Excel DSP 16},"
83 * Commands of SC6000's DSP (SBPRO+special).
97 #define GET_DSP_VERSION 0xe1 /* Get DSP Version */
98 #define GET_DSP_COPYRIGHT 0xe3 /* Get DSP Copyright */
101 * Offsets of SC6000 DSP I/O ports. The offset is added to base I/O port
109 #define DSP_RESET 0x06 /* offset of DSP RESET (wo) */
110 #define DSP_READ 0x0a /* offset of DSP READ (ro) */
111 #define DSP_WRITE 0x0c /* offset of DSP WRITE (w-) */
112 #define DSP_COMMAND 0x0c /* offset of DSP COMMAND (w-) */
113 #define DSP_STATUS 0x0c /* offset of DSP STATUS (r-) */
114 #define DSP_DATAVAIL 0x0e /* offset of DSP DATA AVAILABLE (ro) */
231 * DSP ready to receive data if bit 7 of val == 0 sc6000_write()
240 snd_printk(KERN_ERR "DSP Command (0x%x) timeout.\n", cmd); sc6000_write()
424 printk(KERN_INFO PFX "Detected model: %s, DSP version %d.%d\n", sc6000_init_board()
/linux-4.1.27/drivers/staging/comedi/drivers/
H A Djr3_pci.h1 /* Helper types to take care of the fact that the DSP card memory
26 * processing by the JR3 DSP chip. The raw_channel structure shows the
31 * DSP's internal clock at the time the sample was received. The clock
32 * runs at 1/10 the JR3 DSP cycle time. JR3's slowest DSP runs at 10
139 /* The system_busy bit indicates that the JR3 DSP is currently busy
155 * transmitted to the JR3 DSP along with the sensor data. The
291 * measurements can be placed here. The JR3 DSP will then scale
348 * This value is set by the JR3 DSP after the user has used command
386 * can be written as well as read. The JR3 DSP will use the values
389 * data values and place the sum here. The JR3 DSP will change these
398 * value is set by the JR3 DSP after the user has executed the use
405 * in the vector calculations. This value is set by the JR3 DSP
440 * data values. The JR3 DSP can monitor any 8 contiguous data items
473 * address of the data used for the rate calculation. The JR3 DSP
493 * send commands to the JR3 DSP. Their usage varies with the command
497 * The JR3 DSP will process the command and place a 0 into
499 * the JR3 DSP will place a negative number into command_word0 to
540 /* Count_x is a counter which is incremented every time the JR3 DSP
542 * amount of idle time the JR3 DSP has available. It can also be
543 * used to determine if the JR3 DSP is alive. See the Performance
581 * the JR3 DSP is currently running. Day is the day of the year,
651 * order that is most efficient for the JR3 DSP. The structure is
H A Dc6xdigio.c3 * Hardware driver for Mechatronic Systems Inc. C6x_DIGIO DSP daughter card.
22 * Description: Mechatronic Systems Inc. C6x_DIGIO DSP daughter card
25 * Devices: [Mechatronic Systems Inc.] C6x_DIGIO DSP daughter card (c6xdigio)
284 /* I will call this init anyway but more than likely the DSP board */ c6xdigio_attach()
306 MODULE_DESCRIPTION("Comedi driver for the C6x_DIGIO DSP daughter card");
/linux-4.1.27/sound/pci/cs46xx/
H A Dcs46xx_dsp_scb_types.h24 * the DSP)
87 /* For streaming I/O, the DSP should never alter any words in the DMA
101 R/O for the DSP task */
106 DSP task never needs to even read these.
111 Initialized & modified by the host R/O for the DSP task
119 Initialized by the host R/O for the DSP task */
136 Initialized by the host R/O for the DSP task
145 Initialized by the host Updated by the DSP task
150 mixer subroutine in the "parent" DSP task
172 Current volumes update by the DSP task
174 "parent" DSP task
200 /* First 3 dwords are written by the host and read-only on the DSP */
220 /* Modified by the DSP */
225 /* Set by DSP upon encountering a trap (breakpoint) or a spurious
H A Ddsp_spos_scb_lib.c155 /* update parent first entry in DSP RAM */ _dsp_unlink_scb()
158 /* then update entry in DSP RAM */ _dsp_unlink_scb()
304 /* fill the data that will be wroten to DSP */ _dsp_create_generic_scb()
356 /* update entry in DSP RAM */ _dsp_create_generic_scb()
697 the native DSP rate */ cs46xx_dsp_create_src_task_scb()
1571 /* update SCB entry in DSP RAM */ cs46xx_dsp_pcm_link()
1646 /* update entry in DSP RAM */ cs46xx_src_link()
H A Ddsp_spos.h45 code into DSP */
/linux-4.1.27/arch/metag/include/asm/
H A Dmetag_mem.h149 #define TXUXXRXRQ_DSPEXT_BIT 0x00020000 /* Addr DSP Regs */
155 #define TXUXXRXRQ_DSPRARD0 0 /* DSP RAM A Read Pointer 0 */
156 #define TXUXXRXRQ_DSPRARD1 1 /* DSP RAM A Read Pointer 1 */
157 #define TXUXXRXRQ_DSPRAWR0 2 /* DSP RAM A Write Pointer 0 */
158 #define TXUXXRXRQ_DSPRAWR2 3 /* DSP RAM A Write Pointer 1 */
159 #define TXUXXRXRQ_DSPRBRD0 4 /* DSP RAM B Read Pointer 0 */
160 #define TXUXXRXRQ_DSPRBRD1 5 /* DSP RAM B Read Pointer 1 */
161 #define TXUXXRXRQ_DSPRBWR0 6 /* DSP RAM B Write Pointer 0 */
162 #define TXUXXRXRQ_DSPRBWR1 7 /* DSP RAM B Write Pointer 1 */
163 #define TXUXXRXRQ_DSPRARINC0 8 /* DSP RAM A Read Increment 0 */
164 #define TXUXXRXRQ_DSPRARINC1 9 /* DSP RAM A Read Increment 1 */
165 #define TXUXXRXRQ_DSPRAWINC0 10 /* DSP RAM A Write Increment 0 */
166 #define TXUXXRXRQ_DSPRAWINC1 11 /* DSP RAM A Write Increment 1 */
167 #define TXUXXRXRQ_DSPRBRINC0 12 /* DSP RAM B Read Increment 0 */
168 #define TXUXXRXRQ_DSPRBRINC1 13 /* DSP RAM B Read Increment 1 */
169 #define TXUXXRXRQ_DSPRBWINC0 14 /* DSP RAM B Write Increment 0 */
170 #define TXUXXRXRQ_DSPRBWINC1 15 /* DSP RAM B Write Increment 1 */
731 #define SYSC_MCMGID_DSPRAM0A 0x04 /* DSP RAM D0 block A access */
732 #define SYSC_MCMGID_DSPRAM0B 0x05 /* DSP RAM D0 block B access */
733 #define SYSC_MCMGID_DSPRAM1A 0x06 /* DSP RAM D1 block A access */
734 #define SYSC_MCMGID_DSPRAM1B 0x07 /* DSP RAM D1 block B access */
H A Dmetag_regs.h31 #define TXUDXDSP_MASK 0x0F0FFFFF /* Valid DSP regs */
32 #define TGUDXDSP_MASK 0x0E0E0000 /* Global DSP ACC regs */
452 * DSP EXTENSIONS
456 * using the DSP extensions of the META instruction set need to know.
521 * TXMRSIZE register value only relevant when DSP modulo addressing active
528 * TXDRCTRL register can be used to detect the actaul size of the DSP RAM
545 * TXDRSIZE register provides modulo addressing options for each DSP RAM
758 #define TXENABLE_CLASS_DSP 0x0 /* -> DSP Thread */
759 #define TXENABLE_CLASS_LDSP 0x8 /* -> DSP LITE Thread */
1036 * TXDRCTRL register can be used to partition the DSP RAM space available to
1044 /* Given extracted Pow and Or fields this is threads base within DSP RAM */
H A Dtbx.h249 #define TBICTX_XTDP_BIT 0x0800 /* Saved DSP registers too */
268 /* The METAC_CORE_ID_CONFIG field indicates omitted DSP resources */
537 /* Extended thread state save areas - DSP register states */
539 /* DSP 32-bit accumulator register state (Bits 31:0 of ACX.0) */
541 /* DSP > 32-bit accumulator bits 63:32 of ACX.0 (zero-extended) */
550 /* Extended thread state save areas - DSP register states including DSP RAM */
552 /* DSP 32-bit accumulator register state (Bits 31:0 of ACX.0) */
554 /* DSP 40-bit accumulator register state (Bits 39:8 of ACX.0) */
556 /* DSP RAM Pointers */
558 /* DSP RAM Increments */
562 /* Modulo address region size and DSP RAM module region sizes */
/linux-4.1.27/sound/isa/sb/
H A Dsb8_midi.c26 * Added full duplex UART mode for DSP version 2.0 and later.
81 snd_sbdsp_reset(chip); /* reset DSP */ snd_sb8dsp_midi_input_open()
108 snd_sbdsp_reset(chip); /* reset DSP */ snd_sb8dsp_midi_output_open()
128 snd_sbdsp_reset(chip); /* reset DSP */ snd_sb8dsp_midi_input_close()
146 snd_sbdsp_reset(chip); /* reset DSP */ snd_sb8dsp_midi_output_close()
H A Dsb16_main.c15 * 16bit DMA transfers from DSP chip (capture) until 8bit transfer
16 * to DSP chip (playback) starts. This bug can be avoided with
549 /* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */ snd_sb16_playback_open()
624 /* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */ snd_sb16_capture_open()
869 if ((err = snd_pcm_new(card, "SB16 DSP", device, 1, 1, &pcm)) < 0) snd_sb16dsp_pcm()
871 sprintf(pcm->name, "DSP v%i.%i", chip->version >> 8, chip->version & 0xff); snd_sb16dsp_pcm()
H A Dsb_common.c129 snd_printdd("SB [0x%lx]: DSP chip found, version = %i.%i\n", snd_sbdsp_probe()
157 snd_printk(KERN_INFO "SB [0x%lx]: unknown DSP chip version %i.%i\n", snd_sbdsp_probe()
H A Dsb8_main.c26 * DSP can't respond to commands whilst in "high speed" mode. Caused
604 if ((err = snd_pcm_new(card, "SB8 DSP", device, 1, 1, &pcm)) < 0) snd_sb8dsp_pcm()
606 sprintf(pcm->name, "DSP v%i.%i", chip->version >> 8, chip->version & 0xff); snd_sb8dsp_pcm()
/linux-4.1.27/sound/soc/intel/baytrail/
H A Dsst-baytrail-dsp.c2 * Intel Baytrail SST DSP driver
227 dev_err(sst->dev, "unable to start DSP\n"); sst_byt_boot()
234 /* put DSP into reset, set reset vector and stall */ sst_byt_reset()
241 /* take DSP out of reset and keep stalled for FW loading */ sst_byt_reset()
329 /* register DSP memory blocks - ideally we should get this from ACPI */ sst_byt_init()
H A Dsst-baytrail-ipc.c275 dev_dbg(byt->dev, "ipc: DSP is ready 0x%llX\n", header); sst_byt_fw_ready()
331 * clear IPCD BUSY bit and set DONE bit. Tell DSP we have sst_byt_irq_thread()
612 /* wait for DSP boot completion */ sst_byt_dsp_boot()
631 dev_err(byt->dev, "ipc: error DSP boot timeout\n"); sst_byt_dsp_wait_for_ready()
690 dev_dbg(dev, "initialising Byt DSP IPC\n"); sst_byt_dsp_init()
720 /* keep the DSP in reset state for base FW loading */ sst_byt_dsp_init()
730 /* wait for DSP boot completion */ sst_byt_dsp_init()
736 dev_err(byt->dev, "ipc: error DSP boot timeout\n"); sst_byt_dsp_init()
H A Dsst-baytrail-pcm.c43 /* private data for each PCM DSP stream */
49 /* latest DSP DMA hw pointer */
57 /* runtime DSP */
434 /* load fw and boot DSP */ sst_byt_pcm_dev_resume_early()
/linux-4.1.27/sound/soc/intel/haswell/
H A Dsst-haswell-dsp.c2 * Intel Haswell SST DSP driver
293 /* put DSP into reset and stall */ hsw_reset()
301 /* take DSP out of reset and keep stalled for FW loading */ hsw_reset()
342 /* stall DSP core, set clk to 192/96Mhz */ hsw_set_dsp_D0()
406 /* set DSP to RUN */ hsw_boot()
412 /* stall DSP */ hsw_stall()
422 /* put DSP into reset and stall */ hsw_sleep()
558 /* wait 18 DSP clock ticks */ hsw_block_enable()
597 /* wait 18 DSP clock ticks */ hsw_block_disable()
652 /* enable the DSP SHIM */ hsw_init()
655 dev_err(dev, "error: failed to set DSP D0 and reset SHIM\n"); hsw_init()
664 /* register DSP memory blocks - ideally we should get this from ACPI */ hsw_init()
H A Dsst-haswell-ipc.c238 /* Position info from DSP */
445 dev_dbg(hsw->dev, "ipc: DSP is ready 0x%8.8x offset %d\n", hsw_fw_ready()
448 /* copy data from the DSP FW ready offset */ hsw_fw_ready()
490 trace_ipc_notification("DSP stream under/overrun", hsw_notification_work()
500 trace_ipc_notification("DSP stream position changed for", hsw_notification_work()
514 /* tell DSP that notification has been handled */ hsw_notification_work()
580 /* copy data from the DSP */ hsw_process_reply()
785 /* reply message from DSP */ hsw_irq_thread()
788 /* Handle Immediate reply from DSP Core */ hsw_irq_thread()
792 /* clear DONE bit - tell DSP we have completed */ hsw_irq_thread()
802 /* new message from DSP */ hsw_irq_thread()
805 /* Handle Notification and Delayed reply from DSP Core */ hsw_irq_thread()
1013 /* dont free DSP streams that are not commited */ sst_hsw_stream_free()
1587 dev_dbg(hsw->dev, "loading audio DSP...."); sst_hsw_dsp_load()
1591 dev_err(hsw->dev, "error: failed to wake audio DSP\n"); sst_hsw_dsp_load()
1622 dev_dbg(hsw->dev, "restoring audio DSP...."); sst_hsw_dsp_restore()
1638 /* wait for DSP boot completion */ sst_hsw_dsp_restore()
1694 dev_err(dev, "error: audio DSP boot failure\n"); sst_hsw_dsp_runtime_resume()
1701 dev_err(hsw->dev, "error: audio DSP boot timeout IPCD 0x%x IPCX 0x%x\n", sst_hsw_dsp_runtime_resume()
1828 /* put all param lines to DSP through ipc */ sst_hsw_launch_param_buf()
2108 dev_dbg(dev, "initialising Audio DSP IPC\n"); sst_hsw_dsp_init()
2146 /* keep the DSP in reset state for base FW loading */ sst_hsw_dsp_init()
2165 /* wait for DSP boot completion */ sst_hsw_dsp_init()
2171 dev_err(hsw->dev, "error: audio DSP boot timeout IPCD 0x%x IPCX 0x%x\n", sst_hsw_dsp_init()
H A Dsst-haswell-pcm.c111 /* private data for each PCM DSP stream */
135 /* runtime DSP */
346 /* if module is in RAM on the DSP, apply user settings to module through hsw_waves_switch_put()
347 * ipc. If module is not in RAM on the DSP, store user setting for hsw_waves_switch_put()
414 /* Global DSP volume */
438 /* Create DMA buffer page table for DSP */ create_adsp_page_table()
520 /* DSP stream type depends on DAI ID */ hsw_pcm_hw_params()
1069 /* allocate DSP buffer page tables */ hsw_pcm_probe()
1347 /* We need to wait until the DSP FW stops the streams */ hsw_pcm_prepare()
1366 /* put the DSP to sleep */ hsw_pcm_prepare()
/linux-4.1.27/drivers/net/ethernet/davicom/
H A Ddm9000.h175 #define MII_DM_DSPCR 0x1b /* DSP Control Register */
177 #define DSPCR_INIT_PARAM 0xE100 /* DSP init parameter */
/linux-4.1.27/arch/arm/mach-omap1/
H A Dpm.c283 * Step 4: OMAP DSP Shutdown omap1_pm_suspend()
286 /* stop DSP */ omap1_pm_suspend()
293 /* temporarily enabling api_ck to access DSP registers */ omap1_pm_suspend()
296 /* save DSP registers */ omap1_pm_suspend()
299 /* Stop all DSP domain clocks */ omap1_pm_suspend()
344 * Restore DSP clocks omap1_pm_suspend()
347 /* again temporarily enabling api_ck to access DSP registers */ omap1_pm_suspend()
350 /* Restore DSP domain clocks */ omap1_pm_suspend()
H A Dmcbsp.c43 * are DSP public peripherals. omap1_mcbsp_request()
54 * DSP external peripheral reset omap1_mcbsp_request()
H A Dclock.c181 * The clock control bits are in DSP domain, omap1_ckctl_recalc_dsp_domain()
588 /* Clocks in the DSP domain need api_ck. Just assume bootloader omap1_clk_disable_unused()
589 * has not enabled any DSP clocks */ omap1_clk_disable_unused()
591 pr_info("Skipping reset check for DSP domain clock \"%s\"\n", omap1_clk_disable_unused()
/linux-4.1.27/sound/soc/intel/atom/sst/
H A Dsst_loader.c59 * intel_sst_reset_dsp_mrfld - Resetting SST DSP
61 * This resets DSP in case of MRFLD platfroms
67 dev_dbg(sst_drv_ctx->dev, "sst: Resetting the DSP in mrfld\n"); intel_sst_reset_dsp_mrfld()
87 * sst_start_merrifield - Start the SST DSP processor
89 * This starts the DSP in MERRIFIELD platfroms
95 dev_dbg(sst_drv_ctx->dev, "sst: Starting the DSP in mrfld LALALALA\n"); sst_start_mrfld()
397 * sst_load_fw - function to load FW into DSP
398 * Transfers the FW to DSP using dma/memcpy
/linux-4.1.27/drivers/isdn/mISDN/
H A Ddsp_biquad.h2 * SpanDSP - a series of DSP components for telephony
H A Ddsp_ecdis.h2 * SpanDSP - a series of DSP components for telephony
H A Ddsp_core.c141 * must lock timer events by DSP poll timer.
1113 static struct Bprotocol DSP = { variable in typeref:struct:Bprotocol
1125 printk(KERN_INFO "DSP module %s\n", mISDN_dsp_revision); dsp_init()
1174 printk(KERN_INFO "mISDN_dsp: DSP clocks every %d samples. This equals " dsp_init()
1200 err = mISDN_register_Bprotocol(&DSP); dsp_init()
1202 printk(KERN_ERR "Can't register %s error(%d)\n", DSP.name, err); dsp_init()
1220 mISDN_unregister_Bprotocol(&DSP); dsp_cleanup()
1225 printk(KERN_ERR "mISDN_dsp: Audio DSP object inst list not " dsp_cleanup()
/linux-4.1.27/include/linux/platform_data/
H A Ddma-imx.h35 IMX_DMATYPE_DSP, /* DSP */
H A Dedma.h38 * supported through this interface. (DSP firmware uses it though.)
/linux-4.1.27/include/uapi/linux/
H A Disdnif.h50 #define ISDN_PROTO_L3_TRANSDSP 1 /* Transparent with DSP */
H A Dixjuser.h76 * This group of IOCTLs deal with the record settings of the DSP
78 * The IXJCTL_REC_DEPTH command sets the internal buffer depth of the DSP.
80 * application to service the driver without frame loss. The DSP has 480
357 * This group of IOCTLs deal with the playback settings of the DSP
371 * of the DSP
632 * the DSP. This value cannot be larger than HZ. By
635 * driver and the DSP will be reduced.
697 * other and vice versa (actually done in the DSP read function). It is only
H A Domapfb.h76 /* Values from DSP must map to lower 16-bits */
/linux-4.1.27/arch/mips/include/uapi/asm/
H A Dsigcontext.h54 * DSP ASE in 2.6.12-rc4. Turn sc_mdhi and sc_mdlo into an array of four
/linux-4.1.27/drivers/char/mwave/
H A D3780i.h54 /* DSP I/O port offsets and definitions */
76 unsigned short EnableDspInt:1; /* RW: Enable DSP to X86 ISA interrupt 0=mask it, 1=enable it */
84 /* DSP register indexes used with the configuration register address (index) register */
151 /* DSP registers that exist in MSA I/O space */
269 /* Enables for various DSP components */
274 /* IRQ, DMA, and Base I/O addresses for various DSP components */
281 /* IRQ modes for various DSP components */
H A Dtp3780i.h56 /* DSP abilities constants for 3780i based Thinkpads */
64 /* DSP configuration values for 3780i based Thinkpads */
H A D3780i.c3 * 3780i.c -- helper routines for the 3780i DSP
204 PRINTK_ERROR( KERN_ERR "3780i::dsp3780I_EnableDSP: Error: DSP not enabled. Aborting.\n" ); dsp3780I_EnableDSP()
395 /* Mask DSP to PC interrupt */ dsp3780I_Reset()
457 /* Enable DSP to PC interrupt */ dsp3780I_Run()
711 * Disable DSP to PC interrupts, read the interrupt register, dsp3780I_GetIPCSource()
712 * clear the pending IPC bits, and reenable DSP to PC interrupts dsp3780I_GetIPCSource()
H A Dsmapi.c141 PRINTK_ERROR(KERN_ERR_MWAVE "smapi::smapi_query_DSP_cfg: Error: Could not get DSP Settings. Aborting.\n"); smapi_query_DSP_cfg()
157 "smapi::smapi_query_DSP_cfg get DSP Settings bDSPPresent %x bDSPEnabled %x usDspIRQ %x usDspDMA %x usDspBaseIO %x\n", smapi_query_DSP_cfg()
164 PRINTK_ERROR(KERN_ERR_MWAVE "smapi::smapi_query_DSP_cfg: Worry: DSP base I/O address is 0\n"); smapi_query_DSP_cfg()
166 PRINTK_ERROR(KERN_ERR_MWAVE "smapi::smapi_query_DSP_cfg: Worry: DSP IRQ line is 0\n"); smapi_query_DSP_cfg()
171 PRINTK_ERROR("smapi::smapi_query_DSP_cfg: Error: Could not get DSP modem settings. Aborting.\n"); smapi_query_DSP_cfg()
186 "smapi::smapi_query_DSP_cfg get DSP modem settings bModemEnabled %x usUartIRQ %x usUartBaseIO %x\n", smapi_query_DSP_cfg()
H A Dtp3780i.c199 PRINTK_ERROR(KERN_ERR_MWAVE "tp3780i::tp3780I_CalcResources: Error: Could not query DSP config. Aborting.\n"); tp3780I_CalcResources()
291 PRINTK_ERROR(KERN_ERR_MWAVE "tp3780i::tp3780I_EnableDSP: Error: DSP already enabled!\n"); tp3780I_EnableDSP()
314 PRINTK_ERROR(KERN_ERR_MWAVE "tp3780i::tp3780I_EnableDSP: Error: Invalid DSP base I/O address %x\n", pSettings->usDspBaseIO); tp3780I_EnableDSP()
/linux-4.1.27/sound/
H A Dsound_core.c331 * 3 *16 DSP
476 * DSP's are registered as a triple. Register only one and cheat
481 * register_sound_dsp - register a DSP device
485 * Allocate a DSP device. Unit is the number of the DSP requested.
486 * Pass -1 to request the next free DSP unit.
551 * unregister_sound_dsp - unregister a DSP device
/linux-4.1.27/sound/isa/msnd/
H A Dmsnd_pinnacle.c151 ": DSP message %d 0x%02x\n", snd_msnd_eval_dsp_msg()
174 /* Send ack to DSP */ snd_msnd_interrupt()
177 /* Evaluate queued DSP messages */ snd_msnd_interrupt()
190 /* Send ack to DSP */ snd_msnd_interrupt()
213 snd_printk(KERN_ERR LOGNAME ": Cannot reset DSP\n"); snd_msnd_reset_dsp()
357 /* DSP -> host message queue */ snd_msnd_init_sma()
361 /* Setup some DSP values */ snd_msnd_init_sma()
404 printk(KERN_WARNING LOGNAME ": Error uploading to DSP\n"); upload_dsp_code()
408 printk(KERN_INFO LOGNAME ": DSP firmware uploaded\n"); upload_dsp_code()
451 printk(KERN_WARNING LOGNAME ": Cannot upload DSP code\n"); snd_msnd_initialize()
460 snd_printd(KERN_ERR LOGNAME ": DSP reset timeout\n"); snd_msnd_initialize()
482 printk(KERN_WARNING LOGNAME ": DSP reset failed\n"); snd_msnd_dsp_full_reset()
841 printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must be set " snd_msnd_isa_match()
849 ": \"io\" - DSP I/O base must within the range 0x100 " snd_msnd_isa_match()
961 /* DSP */ snd_msnd_isa_probe()
/linux-4.1.27/sound/pci/pcxhr/
H A Dpcxhr_core.c49 /* registers used on the DSP (port 2) */
262 /* let's reset the DSP */ pcxhr_reset_dsp()
331 * send an executable file to the DSP
347 /* transfert data buffer from PC to DSP */ pcxhr_download_dsp()
358 /* wait DSP ready for new transfer */ pcxhr_download_dsp()
376 /* give some time to boot the DSP */ pcxhr_download_dsp()
422 /* send the hostport address to the DSP (only the upper 24 bit !) */ pcxhr_load_boot_binary()
480 * Array of DSP commands
763 * pcxhr_send_msg - send a DSP message with spinlock
1273 dev_dbg(&mgr->pci->dev, "FATAL DSP ERROR : %x\n", reg); pcxhr_interrupt()
1297 "WARNING DSP timestamp old(%d) new(%d)", pcxhr_threaded_irq()
1313 "ERROR DSP TIME NO DIFF time(%d)\n", pcxhr_threaded_irq()
1317 "ERROR DSP TIME TOO BIG old(%d) add(%d)\n", pcxhr_threaded_irq()
1322 "ERROR DSP TIME increased by %d\n", pcxhr_threaded_irq()
H A Dpcxhr_core.h38 /* DSP time available on MailBox4 register : 24 bit time samples() */
H A Dpcxhr.c935 /* start the DSP-timer */ pcxhr_prepare()
1116 pcxhr_hardware_timer(mgr, 0); /* stop the DSP-timer */ pcxhr_close()
1257 /* stats available when embedded DSP is running */ pcxhr_proc_info()
1347 /* commands available when embedded DSP is running */ pcxhr_proc_sync()
1367 /* commands available when embedded DSP is running */ pcxhr_proc_gpio_read()
1386 /* commands available when embedded DSP is running */ pcxhr_proc_gpo_write()
1415 /* commands available when embedded DSP is running */ pcxhr_proc_ltc()
1676 /* create a DSP loader */ pcxhr_probe()
/linux-4.1.27/arch/metag/tbx/
H A Dtbictx.S150 TSTT D0Ar2,#TBICTX_XTDP_BIT /* Save per-thread DSP regs? */
153 * Save per-thread DSP registers; ACC.0, PR.0, PI.1-3 (PI.0 is zero)
158 D SETL [A0.2++],D0AR.0,D1AR.0 /* Save DSP RAM registers */
303 TSTT D1Re0,#TBICTX_XTDP_BIT /* Get per-thread DSP regs? */
306 * Get per-thread DSP registers; ACC.0, PR.0, PI.1-3 (PI.0 is zero)
321 D GETL D0AR.0,D1AR.0,[A0.2++] /* Restore DSP RAM registers */
/linux-4.1.27/sound/pci/hda/
H A Dpatch_ca0132.c133 /* Latency introduced by DSP blocks in milliseconds. */
541 /* DSP DMA is bypassed/enabled */
557 /* DSP rate is 48 kHz/96 kHz */
563 /* Decode Loop (DSP->SRC->DSP) is disabled/enabled */
599 /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
727 /* DSP download related */
1064 * CA0132 DSP IO stuffs
1084 * Wait for DSP to be ready for commands
1102 * Write SCP data to DSP
1133 * Write multiple SCP data to DSP
1300 * Send SCP message to DSP
1379 * Prepare and send the SCP message to DSP
1381 * @mod_id: ID of the DSP module to send the command
1382 * @req: ID of request to send to the DSP module
1468 * Set DSP parameters
1483 * Allocate a DSP DMA channel via an SCP message
1511 * Free a DSP DMA via an SCP message
1535 * (Re)start the DSP
1570 * Reset the DSP
1592 * Convert chip address to DSP address
1613 * Check if the DSP DMA is active
1736 * Setup the DSP DMA per-transfer-specific registers
1827 * Start the DSP DMA
1863 * Stop the DSP DMA
1967 * Allocate DSP ports for the download stream
2014 * free DSP ports
2033 * HDA DMA engine stuffs for DSP code download
2068 * Reset DMA for DSP download
2178 * CA0132 chip DSP transfer stuffs. For DSP download.
2214 * Write a block of data into DSP code or data RAM using pre-allocated
2221 * @dma_engine: pointer to DMA engine to be used for DSP download
2222 * @dma_chan: The number of DMA channels used for DSP download
2412 * Write the entire DSP image of a DSP code/data overlay to DSP memories
2418 * @sample_rate: sampling rate of the stream used for DSP download
2419 * @channels: channels of the stream used for DSP download
2543 * CA0132 DSP download stuffs.
2549 /*set DSP speaker to 2.0 configuration*/ dspload_post_setup()
2558 * dspload_image - Download DSP from a DSP Image Fast Load structure.
2565 * @autostart: TRUE if DSP starts after loading; ignored if ovly is TRUE
2569 * Download DSP from a DSP Image Fast Load structure. This structure is a
2651 pr_info("ca0132 DOWNLOAD OK :-) DSP IS RUNNING.\n"); dspload_wait_loaded()
2657 pr_err("ca0132 DOWNLOAD FAILED!!! DSP IS NOT RUNNING.\n"); dspload_wait_loaded()
4263 * Setup default parameters for DSP
4285 /*remove DSP headroom*/ ca0132_setup_defaults()
4434 /* Sends before DSP download. */
4450 /* Other verbs tables. Sends after DSP download. */
/linux-4.1.27/arch/m68k/mac/
H A Dpsc.c5 * by the VIAs (Ethernet, DSP, SCC).
13 * they aren't actually interrupt lines but data lines (to the DSP?)
/linux-4.1.27/drivers/net/ethernet/intel/e1000e/
H A D80003es2lan.h66 /* DSP Distance Register (Page 5, Register 26)
/linux-4.1.27/arch/openrisc/include/asm/
H A Delf.h41 * This covers all of general/DSP/FPU regs.
/linux-4.1.27/arch/c6x/include/asm/
H A Dbitops.h21 * We are lucky, DSP is perfect for bitops: do it in 3 cycles
/linux-4.1.27/arch/metag/
H A DMakefile27 # Only use TBI API 1.4 if DSP is enabled for META12 cores
/linux-4.1.27/drivers/isdn/hisax/
H A Djade.c69 printk(KERN_INFO "Can not see ready bit from JADE DSP (reg=0x%X, value=0x%X)\n", reg, value); jade_write_indirect()
284 /* Stop DSP audio tx/rx */ initjade()
299 /* Unmask HDLC int (don't forget DSP int later on)*/ initjade()
/linux-4.1.27/sound/isa/wavefront/
H A Dwavefront_fx.c33 #define FX_LSB_TRANSFER 0x01 /* transfer after DSP LSB byte written */
34 #define FX_MSB_TRANSFER 0x02 /* transfer after DSP MSB byte written */
35 #define FX_AUTO_INCR 0x04 /* auto-increment DSP address after transfer */
/linux-4.1.27/drivers/media/i2c/
H A Dmsp3400-driver.c107 /* DSP unit subaddress */
249 * bits 9 8 5 - SCART DSP input Select:
250 * 0 0 0 - SCART 1 to DSP input (reset position)
251 * 0 1 0 - MONO to DSP input
252 * 1 0 0 - SCART 2 to DSP input
253 * 1 1 1 - Mute DSP input
277 /* SCART DSP Input select */
/linux-4.1.27/arch/sh/kernel/
H A Dtraps_32.c569 * SH-DSP support gerg@snapgear.com.
576 * Safe guard if DSP mode is already enabled or we're lacking is_dsp_inst()
577 * the DSP altogether. is_dsp_inst()
586 /* Check for any type of DSP or support instruction */ is_dsp_inst()
635 /* Check if it's a DSP instruction */ do_reserved_inst()
637 /* Enable DSP mode, and restart instruction. */ do_reserved_inst()
639 /* Save DSP mode */ do_reserved_inst()
/linux-4.1.27/drivers/media/radio/
H A Dsaa7706h.c2 * saa7706.c Philips SAA7706H Car Radio DSP driver
40 $0FFF DSP CONTROL
442 MODULE_DESCRIPTION("SAA7706H Car Radio DSP driver");
/linux-4.1.27/arch/mips/ar7/
H A Dclock.c350 printk(KERN_INFO "Clocks: Setting DSP clock\n"); tnetd7200_init_clocks()
381 printk(KERN_INFO "Clocks: Setting DSP clock\n"); tnetd7200_init_clocks()
391 printk(KERN_INFO "Clocks: Setting DSP clock\n"); tnetd7200_init_clocks()
/linux-4.1.27/drivers/media/i2c/soc_camera/
H A Dov2640.c36 * DSP registers
39 #define R_BYPASS 0x05 /* Bypass DSP */
40 #define R_BYPASS_DSP_BYPAS 0x01 /* Bypass DSP, sensor out directly */
41 #define R_BYPASS_USE_DSP 0x00 /* Use the internal DSP */
74 #define CTRL2 0x86 /* DSP Module enable 2 */
80 #define CTRL3 0x87 /* DSP Module enable 3 */
91 #define CTRL0 0xC2 /* DSP Module enable 0 */
100 #define CTRL1 0xC3 /* DSP Module enable 1 */
477 * The preamble, setup the internal DSP to input an UXGA (1600x1200) image.
H A Dov772x.c134 #define DSP_CTRL1 0x64 /* DSP control byte 1 */
135 #define DSP_CTRL2 0x65 /* DSP control byte 2 */
136 #define DSP_CTRL3 0x66 /* DSP control byte 3 */
137 #define DSP_CTRL4 0x67 /* DSP control byte 4 */
210 #define DSPAUTO 0xAC /* DSP auto function ON/OFF control */
346 #define CBAR_MASK 0x20 /* DSP Color bar mask */
356 /* DSPAUTO (DSP Auto Function ON/OFF Control) */
803 /* DSP_CTRL4: AEC reference point and DSP output format. */ ov772x_set_params()
/linux-4.1.27/arch/x86/include/asm/
H A Dplatform_sst_audio.h30 * ref: DSP spec v0.75 */
/linux-4.1.27/arch/metag/kernel/
H A Dsetup.c446 case (0x01): return "DSP"; get_cpu_capabilities()
448 case (0x09): return "DSP+LFPU"; get_cpu_capabilities()
450 case (0x11): return "DSP+FPU"; get_cpu_capabilities()
456 return "DSP"; get_cpu_capabilities()
H A Dtraps.c166 panic("couldn't save DSP context"); dspram_save()
175 panic("couldn't save DSP context"); dspram_save()
192 * context state, e.g. DSP regs and RAMs.
202 * tell us what DSP resources the current process is nest_interrupts()
208 * kernel because the kernel doesn't use DSP hardware. nest_interrupts()
219 panic("couldn't save DSP context: ENOMEM"); nest_interrupts()
350 * using DSP hardware. tail_end_sys()
/linux-4.1.27/drivers/tty/serial/
H A Dbfin_sport_uart.h14 * This application note describe how to implement a UART on a Sharc DSP,
/linux-4.1.27/arch/sh/include/asm/
H A Dprocessor.h38 /* SH4AL-DSP types */
H A Dprocessor_32.h60 * DSP structure and data
/linux-4.1.27/arch/arm/mach-footbridge/
H A Dnetwinder-hw.c551 printk("SoundBlaster: DSP reset failed\n"); rwa010_soundblaster_reset()
553 dprintk("SoundBlaster DSP reset: %02X (AA)\n", inb(0x22a)); rwa010_soundblaster_reset()
562 printk("SoundBlaster: DSP not ready\n"); rwa010_soundblaster_reset()
566 dprintk("SoundBlaster DSP id: "); rwa010_soundblaster_reset()
/linux-4.1.27/arch/arm/mach-omap1/include/mach/
H A Domap7xx.h90 * OMAP7XX DSP control registers
/linux-4.1.27/sound/pci/vx222/
H A Dvx222.h30 /* h/w config; for PLX and for DSP */
/linux-4.1.27/sound/pcmcia/vx/
H A Dvxp_ops.c106 * vx_reset_dsp - reset the DSP
262 /* DSP boot */ vxp_load_dsp()
265 /* DSP image */ vxp_load_dsp()
361 * data size must be aligned to 6 bytes to ensure the 24bit alignment on DSP.
H A Dvxpocket.c88 * 1 DSP, 1 sync UER
111 * 1 DSP, 1 sync UER, 1 sync World Clock (NIY)
/linux-4.1.27/drivers/video/fbdev/aty/
H A Datyfb.h93 u32 dsp_config; /* Mach64 GTB DSP */
94 u32 dsp_on_off; /* Mach64 GTB DSP */
/linux-4.1.27/sound/oss/dmasound/
H A Ddmasound.h8 * Unfortunately Creative called the codec chip of SB as a DSP. For this
10 * device for true DSP processors but it will be called something else.
/linux-4.1.27/arch/sh/kernel/cpu/sh3/
H A Dentry.S282 5: .long 0x00001000 ! DSP
357 ! Setup stack and save DSP context (k0 contains original r15 on return)
446 ! Setup stack and save DSP context (k0 contains original r15 on return)
/linux-4.1.27/arch/arm/mach-davinci/
H A Ddevices-da8xx.c804 { /* DSP boot address */
809 { /* DSP interrupt registers */
884 pr_err("%s: can't register DSP device: %d\n", __func__, ret); da8xx_register_rproc()
/linux-4.1.27/sound/pci/korg1212/
H A Dkorg1212.c66 K1212_STATE_UNINITIALIZED, // the card is awaiting DSP download
67 K1212_STATE_DSP_IN_PROCESS, // the card is currently downloading its DSP code
68 K1212_STATE_DSP_COMPLETE, // the card has finished the DSP download
99 K1212_DB_BootFromDSPPage4 = 0xA4, // instructs the card to boot from the DSP microcode
103 K1212_DB_StartDSPDownload = 0xAF // tells the card to download its DSP firmware.
435 "DSP download in process",
436 "DSP download complete",
1039 K1212_DEBUG_PRINTK("K1212_DEBUG: DSP download is complete. [%s]\n", snd_korg1212_OnDSPDownloadComplete()
1206 K1212_DEBUG_PRINTK("K1212_DEBUG: DSP download is starting... [%s]\n", snd_korg1212_downloadDSPCode()
1221 K1212_DEBUG_PRINTK("K1212_DEBUG: Start DSP Download RC = %d [%s]\n", snd_korg1212_downloadDSPCode()
2098 // free up memory resources used for the DSP download. snd_korg1212_free()
2346 K1212_DEBUG_PRINTK("K1212_DEBUG: DSP Code area = 0x%p (0x%08x) %d bytes [%s]\n", snd_korg1212_create()
/linux-4.1.27/drivers/media/tuners/
H A Dtuner-xc2028-types.h20 Those firmwares are capable of using xc2038 DSP to decode audio and
/linux-4.1.27/drivers/net/ethernet/sfc/
H A Dfalcon_boards.c331 "waiting for DSP boot (attempt %d)...\n", i); sfe4001_poweron()
333 /* In flash config mode, DSP does not turn on AFE, so sfe4001_poweron()
344 /* Check DSP has asserted AFE power line */ sfe4001_poweron()
353 netif_info(efx, hw, efx->net_dev, "timed out waiting for DSP boot\n"); sfe4001_poweron()
/linux-4.1.27/sound/soc/intel/boards/
H A Dbytcr_rt5640.c111 /* The DSP will covert the FE rate to 48k, stereo, 24bits */ byt_codec_fixup()
H A Dhaswell.c176 /* audio machine driver for Haswell Lynxpoint DSP + RT5640 */
/linux-4.1.27/drivers/char/
H A Ddsp56k.c110 /* Power down the DSP */ dsp56k_reset()
118 /* Power up the DSP */ dsp56k_reset()
/linux-4.1.27/arch/mips/include/asm/
H A Dprocessor.h268 /* Saved state of the DSP ASE, if available. */
328 * Saved DSP stuff \

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