Searched refs:DMA_CH_IER (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-dev.c618 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, NIE, 1); xgbe_enable_dma_interrupts()
619 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, AIE, 1); xgbe_enable_dma_interrupts()
620 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 1); xgbe_enable_dma_interrupts()
628 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1); xgbe_enable_dma_interrupts()
636 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 1); xgbe_enable_dma_interrupts()
638 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1); xgbe_enable_dma_interrupts()
641 XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier); xgbe_enable_dma_interrupts()
1755 dma_ch_ier = XGMAC_DMA_IOREAD(channel, DMA_CH_IER); xgbe_enable_int()
1759 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1); xgbe_enable_int()
1762 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TXSE, 1); xgbe_enable_int()
1765 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TBUE, 1); xgbe_enable_int()
1768 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1); xgbe_enable_int()
1771 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 1); xgbe_enable_int()
1774 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RSE, 1); xgbe_enable_int()
1777 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1); xgbe_enable_int()
1778 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1); xgbe_enable_int()
1781 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 1); xgbe_enable_int()
1790 XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier); xgbe_enable_int()
1800 dma_ch_ier = XGMAC_DMA_IOREAD(channel, DMA_CH_IER); xgbe_disable_int()
1804 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 0); xgbe_disable_int()
1807 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TXSE, 0); xgbe_disable_int()
1810 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TBUE, 0); xgbe_disable_int()
1813 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 0); xgbe_disable_int()
1816 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 0); xgbe_disable_int()
1819 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RSE, 0); xgbe_disable_int()
1822 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 0); xgbe_disable_int()
1823 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 0); xgbe_disable_int()
1826 XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 0); xgbe_disable_int()
1836 XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier); xgbe_disable_int()
H A Dxgbe-common.h204 #define DMA_CH_IER 0x38 macro

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