| /linux-4.1.27/drivers/clk/samsung/ |
| D | clk-exynos5410.c | 34 #define DIV_CPU0 0x500 macro
111 DIV(0, "div_arm", "mout_cpu", DIV_CPU0, 0, 3),
112 DIV(0, "div_arm2", "div_arm", DIV_CPU0, 28, 3),
114 DIV(0, "div_acp", "div_arm2", DIV_CPU0, 8, 3),
115 DIV(0, "div_cpud", "div_arm2", DIV_CPU0, 4, 3),
116 DIV(0, "div_atb", "div_arm2", DIV_CPU0, 16, 3),
117 DIV(0, "pclk_dbg", "div_arm2", DIV_CPU0, 20, 3),
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| D | clk-exynos4415.c | 113 #define DIV_CPU0 0x14500 macro
205 DIV_CPU0,
555 DIV(CLK_DIV_CORE2, "div_core2", "div_core", DIV_CPU0, 28, 3),
556 DIV_F(CLK_DIV_APLL, "div_apll", "mout_apll", DIV_CPU0, 24, 3,
558 DIV(CLK_DIV_PCLK_DBG, "div_pclk_dbg", "div_core2", DIV_CPU0, 20, 3),
559 DIV(CLK_DIV_ATB, "div_atb", "div_core2", DIV_CPU0, 16, 3),
560 DIV(CLK_DIV_PERIPH, "div_periph", "div_core2", DIV_CPU0, 12, 3),
561 DIV(CLK_DIV_COREM1, "div_corem1", "div_core2", DIV_CPU0, 8, 3),
562 DIV(CLK_DIV_COREM0, "div_corem0", "div_core2", DIV_CPU0, 4, 3),
563 DIV_F(CLK_DIV_CORE, "div_core", "mout_core", DIV_CPU0, 0, 3,
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| D | clk-exynos3250.c | 88 #define DIV_CPU0 0x14500 macro
171 DIV_CPU0,
411 DIV(CLK_DIV_CORE2, "div_core2", "div_core", DIV_CPU0, 28, 3),
412 DIV(CLK_DIV_APLL, "div_apll", "mout_apll", DIV_CPU0, 24, 3),
413 DIV(CLK_DIV_PCLK_DBG, "div_pclk_dbg", "div_core2", DIV_CPU0, 20, 3),
414 DIV(CLK_DIV_ATB, "div_atb", "div_core2", DIV_CPU0, 16, 3),
415 DIV(CLK_DIV_COREM, "div_corem", "div_core2", DIV_CPU0, 4, 3),
416 DIV(CLK_DIV_CORE, "div_core", "mout_core", DIV_CPU0, 0, 3),
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| D | clk-exynos4.c | 118 #define DIV_CPU0 0x14500 macro
266 DIV_CPU0,
717 DIV(0, "div_core", "mout_core", DIV_CPU0, 0, 3),
718 DIV(0, "div_corem0", "div_core2", DIV_CPU0, 4, 3),
719 DIV(0, "div_corem1", "div_core2", DIV_CPU0, 8, 3),
720 DIV(0, "div_periph", "div_core2", DIV_CPU0, 12, 3),
721 DIV(0, "div_atb", "mout_core", DIV_CPU0, 16, 3),
722 DIV(0, "div_pclk_dbg", "div_atb", DIV_CPU0, 20, 3),
723 DIV(CLK_ARM_CLK, "div_core2", "div_core", DIV_CPU0, 28, 3),
772 DIV(CLK_SCLK_APLL, "sclk_apll", "mout_apll", DIV_CPU0, 24, 3),
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| D | clk-exynos5250.c | 26 #define DIV_CPU0 0x500 macro
123 DIV_CPU0,
382 DIV(0, "div_arm", "mout_cpu", DIV_CPU0, 0, 3),
383 DIV(0, "div_apll", "mout_apll", DIV_CPU0, 24, 3),
384 DIV_A(0, "div_arm2", "div_arm", DIV_CPU0, 28, 3, "armclk"),
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| D | clk-exynos5420.c | 26 #define DIV_CPU0 0x500 macro
165 DIV_CPU0,
780 DIV(0, "div_arm", "mout_cpu", DIV_CPU0, 0, 3),
781 DIV(0, "sclk_apll", "mout_apll", DIV_CPU0, 24, 3),
782 DIV(0, "armclk2", "div_arm", DIV_CPU0, 28, 3),
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