Searched refs:DCSR_RUN (Results 1 – 12 of 12) sorted by relevance
128 DCSR(prtd->dma_ch) = DCSR_RUN; in pxa2xx_pcm_trigger()134 DCSR(prtd->dma_ch) &= ~DCSR_RUN; in pxa2xx_pcm_trigger()138 DCSR(prtd->dma_ch) |= DCSR_RUN; in pxa2xx_pcm_trigger()142 DCSR(prtd->dma_ch) |= DCSR_RUN; in pxa2xx_pcm_trigger()180 DCSR(prtd->dma_ch) &= ~DCSR_RUN; in __pxa2xx_pcm_prepare()
160 DCSR(si->rxdma) |= DCSR_RUN; in pxa_irda_fir_dma_rx_start()169 DCSR(si->txdma) |= DCSR_RUN; in pxa_irda_fir_dma_tx_start()208 DCSR(si->rxdma) &= ~DCSR_RUN; in pxa_irda_set_speed()352 DCSR(channel) = dcsr & ~DCSR_RUN; in pxa_irda_fir_dma_rx_irq()365 DCSR(channel) = dcsr & ~DCSR_RUN; in pxa_irda_fir_dma_tx_irq()475 DCSR(si->rxdma) &= ~DCSR_RUN; in pxa_irda_fir_irq()556 DCSR(si->rxdma) &= ~DCSR_RUN; in pxa_irda_hard_xmit()652 DCSR(si->txdma) &= ~DCSR_RUN; in pxa_irda_shutdown()653 DCSR(si->rxdma) &= ~DCSR_RUN; in pxa_irda_shutdown()
41 #define DCSR_RUN (1 << 0) macro209 dcsr = DCSR_STRTA | DCSR_IE | DCSR_RUN; in sa11x0_dma_start_sg()213 dcsr = DCSR_STRTB | DCSR_IE | DCSR_RUN; in sa11x0_dma_start_sg()320 writel_relaxed(DCSR_RUN | DCSR_STRTA | DCSR_STRTB, in sa11x0_dma_start_txd()719 writel(DCSR_RUN | DCSR_IE, p->base + DMA_DCSR_C); in sa11x0_dma_device_pause()746 writel(DCSR_RUN | DCSR_IE, p->base + DMA_DCSR_S); in sa11x0_dma_device_resume()775 writel(DCSR_RUN | DCSR_IE | in sa11x0_dma_device_terminate_all()926 writel_relaxed(DCSR_RUN | DCSR_IE | DCSR_ERROR | in sa11x0_dma_probe()1001 if (dcsr & DCSR_RUN) { in sa11x0_dma_suspend()1002 writel(DCSR_RUN | DCSR_IE, p->base + DMA_DCSR_C); in sa11x0_dma_suspend()[all …]
36 #define DCSR_RUN BIT(31) /* Run Bit (read / write) */ macro169 writel(readl(phy->base + reg) | DCSR_RUN, phy->base + reg); in enable_chan()180 writel(readl(phy->base + reg) & ~DCSR_RUN, phy->base + reg); in disable_chan()
252 && (DCSR(drv_data->tx_channel) & DCSR_RUN)) { in pxa2xx_spi_dma_transfer()333 DCSR(drv_data->rx_channel) |= DCSR_RUN; in pxa2xx_spi_dma_start()334 DCSR(drv_data->tx_channel) |= DCSR_RUN; in pxa2xx_spi_dma_start()
16 #define DCSR_RUN (1 << 31) /* Run Bit (read / write) */ macro
148 DCSR(pd->dma_channel) = DCSR_RUN; in pxa_bmdma_start()158 if ((DCSR(pd->dma_channel) & DCSR_RUN) && in pxa_bmdma_stop()
254 DCSR(host->dma) = DCSR_RUN; in pxamci_setup_data()346 DCSR(host->dma) = DCSR_RUN; in pxamci_cmd_done()
266 DCSR(dma) = DCSR_NODESC | DCSR_RUN; in smc_pxa_dma_insl()294 DCSR(dma) = DCSR_NODESC | DCSR_RUN; in smc_pxa_dma_outsl()
301 DCSR(dma) = DCSR_NODESC | DCSR_RUN; in smc_pxa_dma_insl()340 DCSR(dma) = DCSR_NODESC | DCSR_RUN; in smc_pxa_dma_insw()
584 DCSR(info->data_dma_ch) |= DCSR_RUN; in start_data_dma()
559 DCSR(pcdev->dma_chans[i]) = DCSR_RUN; in pxa_dma_start_channels()