| /linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/ |
| H A D | exynos5410.h | 22 #define CLK_UART0 257 macro
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| H A D | exynos5250.h | 94 #define CLK_UART0 289 macro
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| H A D | pistachio-clk.h | 42 #define CLK_UART0 48 macro
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| H A D | exynos5420.h | 66 #define CLK_UART0 257 macro
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| H A D | s5pv210.h | 164 #define CLK_UART0 143 macro
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| H A D | exynos3250.h | 219 #define CLK_UART0 216 macro
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| H A D | exynos4.h | 152 #define CLK_UART0 312 macro
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| H A D | exynos4415.h | 286 #define CLK_UART0 291 macro
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| /linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| H A D | exynos5410.h | 22 #define CLK_UART0 257 macro
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| H A D | exynos5250.h | 94 #define CLK_UART0 289 macro
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| H A D | pistachio-clk.h | 42 #define CLK_UART0 48 macro
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| H A D | exynos5420.h | 66 #define CLK_UART0 257 macro
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| H A D | s5pv210.h | 164 #define CLK_UART0 143 macro
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| H A D | exynos3250.h | 219 #define CLK_UART0 216 macro
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| H A D | exynos4.h | 152 #define CLK_UART0 312 macro
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| H A D | exynos4415.h | 286 #define CLK_UART0 291 macro
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| /linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| H A D | exynos5410.h | 22 #define CLK_UART0 257 macro
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| H A D | exynos5250.h | 94 #define CLK_UART0 289 macro
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| H A D | pistachio-clk.h | 42 #define CLK_UART0 48 macro
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| H A D | exynos5420.h | 66 #define CLK_UART0 257 macro
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| H A D | s5pv210.h | 164 #define CLK_UART0 143 macro
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| H A D | exynos3250.h | 219 #define CLK_UART0 216 macro
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| H A D | exynos4.h | 152 #define CLK_UART0 312 macro
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| H A D | exynos4415.h | 286 #define CLK_UART0 291 macro
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| /linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/ |
| H A D | exynos5410.h | 22 #define CLK_UART0 257 macro
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| H A D | exynos5250.h | 94 #define CLK_UART0 289 macro
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| H A D | pistachio-clk.h | 42 #define CLK_UART0 48 macro
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| H A D | exynos5420.h | 66 #define CLK_UART0 257 macro
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| H A D | s5pv210.h | 164 #define CLK_UART0 143 macro
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| H A D | exynos3250.h | 219 #define CLK_UART0 216 macro
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| H A D | exynos4.h | 152 #define CLK_UART0 312 macro
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| H A D | exynos4415.h | 286 #define CLK_UART0 291 macro
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| /linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/ |
| H A D | exynos5410.h | 22 #define CLK_UART0 257 macro
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| H A D | exynos5250.h | 94 #define CLK_UART0 289 macro
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| H A D | pistachio-clk.h | 42 #define CLK_UART0 48 macro
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| H A D | exynos5420.h | 66 #define CLK_UART0 257 macro
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| H A D | s5pv210.h | 164 #define CLK_UART0 143 macro
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| H A D | exynos3250.h | 219 #define CLK_UART0 216 macro
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| H A D | exynos4.h | 152 #define CLK_UART0 312 macro
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| H A D | exynos4415.h | 286 #define CLK_UART0 291 macro
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| /linux-4.1.27/include/dt-bindings/clock/ |
| H A D | exynos5410.h | 22 #define CLK_UART0 257 macro
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| H A D | exynos5250.h | 94 #define CLK_UART0 289 macro
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| H A D | pistachio-clk.h | 42 #define CLK_UART0 48 macro
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| H A D | exynos5420.h | 66 #define CLK_UART0 257 macro
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| H A D | s5pv210.h | 164 #define CLK_UART0 143 macro
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| H A D | exynos3250.h | 219 #define CLK_UART0 216 macro
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| H A D | exynos4.h | 152 #define CLK_UART0 312 macro
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| H A D | exynos4415.h | 286 #define CLK_UART0 291 macro
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| /linux-4.1.27/drivers/clk/samsung/ |
| H A D | clk-exynos5410.c | 160 GATE(CLK_UART0, "uart0", "aclk66", GATE_IP_PERIC, 0, 0, 0),
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| H A D | clk-s5pv210.c | 619 GATE(CLK_UART0, "uart0", "dout_pclkp", CLK_GATE_IP3, 17, 0, 0),
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| H A D | clk-exynos5250.c | 607 GATE(CLK_UART0, "uart0", "div_aclk66", GATE_IP_PERIC, 0, 0, 0),
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| H A D | clk-exynos3250.c | 652 GATE(CLK_UART0, "uart0", "div_aclk_100", GATE_IP_PERIL, 0, 0, 0),
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| H A D | clk-exynos4415.c | 858 GATE(CLK_UART0, "uart0", "div_aclk_100", GATE_IP_PERIL, 0, 0, 0),
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| H A D | clk-exynos5420.c | 1028 GATE(CLK_UART0, "uart0", "mout_user_aclk66_peric",
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| H A D | clk-exynos4.c | 979 GATE(CLK_UART0, "uart0", "aclk100", GATE_IP_PERIL, 0,
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| /linux-4.1.27/drivers/clk/pistachio/ |
| H A D | clk-pistachio.c | 38 GATE(CLK_UART0, "uart0", "uart0_div", 0x104, 16),
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