Searched refs:CLK_GSCL1 (Results 1 - 14 of 14) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dexynos5250.h62 #define CLK_GSCL1 257 macro
H A Dexynos5420.h165 #define CLK_GSCL1 466 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dexynos5250.h62 #define CLK_GSCL1 257 macro
H A Dexynos5420.h165 #define CLK_GSCL1 466 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dexynos5250.h62 #define CLK_GSCL1 257 macro
H A Dexynos5420.h165 #define CLK_GSCL1 466 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dexynos5250.h62 #define CLK_GSCL1 257 macro
H A Dexynos5420.h165 #define CLK_GSCL1 466 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dexynos5250.h62 #define CLK_GSCL1 257 macro
H A Dexynos5420.h165 #define CLK_GSCL1 466 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Dexynos5250.h62 #define CLK_GSCL1 257 macro
H A Dexynos5420.h165 #define CLK_GSCL1 466 macro
/linux-4.1.27/drivers/clk/samsung/
H A Dclk-exynos5250.c546 GATE(CLK_GSCL1, "gscl1", "mout_aclk266_gscl_sub", GATE_IP_GSCL, 1, 0,
H A Dclk-exynos5420.c1132 GATE(CLK_GSCL1, "gscl1", "aclk300_gscl", GATE_IP_GSCL0, 1, 0, 0),

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