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Searched refs:CLK_DIVIDER_ONE_BASED (Results 1 – 12 of 12) sorted by relevance

/linux-4.1.27/drivers/clk/zynq/
Dclkc.c142 0, fclk_ctrl_reg, 8, 6, CLK_DIVIDER_ONE_BASED | in zynq_clk_register_fclk()
147 CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, in zynq_clk_register_fclk()
199 CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, lock); in zynq_clk_register_periph_clk()
288 SLCR_ARM_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED | in zynq_clk_setup()
332 SLCR_DDR_CLK_CTRL, 26, 6, CLK_DIVIDER_ONE_BASED | in zynq_clk_setup()
338 SLCR_DDR_CLK_CTRL, 20, 6, CLK_DIVIDER_ONE_BASED | in zynq_clk_setup()
345 SLCR_DCI_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED | in zynq_clk_setup()
349 CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, in zynq_clk_setup()
396 SLCR_GEM0_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED | in zynq_clk_setup()
400 CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, in zynq_clk_setup()
[all …]
/linux-4.1.27/drivers/clk/
Dclk-ls1x.c109 CLK_DIVIDER_ONE_BASED | in ls1x_clk_init()
126 DIV_DC_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock); in ls1x_clk_init()
142 DIV_DDR_WIDTH, CLK_DIVIDER_ONE_BASED, in ls1x_clk_init()
Dclk-divider.c60 if (flags & CLK_DIVIDER_ONE_BASED) in _get_maxdiv()
83 if (flags & CLK_DIVIDER_ONE_BASED) in _get_div()
106 if (flags & CLK_DIVIDER_ONE_BASED) in _get_val()
Dclk-asm9260.c316 base + dc->reg, 0, 8, CLK_DIVIDER_ONE_BASED, in asm9260_acc_init()
Dclk-nomadik.c550 CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, in of_nomadik_hclk_setup()
/linux-4.1.27/drivers/clk/ti/
Ddivider.c46 if (divider->flags & CLK_DIVIDER_ONE_BASED) in _get_maxdiv()
68 if (divider->flags & CLK_DIVIDER_ONE_BASED) in _get_div()
90 if (divider->flags & CLK_DIVIDER_ONE_BASED) in _get_val()
379 div->flags |= CLK_DIVIDER_ONE_BASED; in ti_clk_build_component_div()
410 div_flags |= CLK_DIVIDER_ONE_BASED; in ti_clk_register_divider()
502 if (flags & CLK_DIVIDER_ONE_BASED) in _get_divider_width()
545 *div_flags |= CLK_DIVIDER_ONE_BASED; in ti_clk_divider_populate()
/linux-4.1.27/drivers/clk/mmp/
Dclk-mmp2.c342 10, 4, CLK_DIVIDER_ONE_BASED, &clk_lock); in mmp2_clk_init()
373 8, 4, CLK_DIVIDER_ONE_BASED, &clk_lock); in mmp2_clk_init()
396 8, 4, CLK_DIVIDER_ONE_BASED, &clk_lock); in mmp2_clk_init()
415 17, 4, CLK_DIVIDER_ONE_BASED, &clk_lock); in mmp2_clk_init()
443 16, 4, CLK_DIVIDER_ONE_BASED, &clk_lock); in mmp2_clk_init()
Dclk-mix.c33 if (mix->div_flags & CLK_DIVIDER_ONE_BASED) in _get_maxdiv()
50 if (mix->div_flags & CLK_DIVIDER_ONE_BASED) in _get_div()
87 if (mix->div_flags & CLK_DIVIDER_ONE_BASED) in _get_div_val()
/linux-4.1.27/drivers/clk/mxs/
Dclk-div.c100 div->divider.flags = CLK_DIVIDER_ONE_BASED; in mxs_clk_div()
/linux-4.1.27/arch/powerpc/platforms/512x/
Dclock-commonclk.c759 CLK_DIVIDER_ONE_BASED); in mpc512x_clk_setup_clock_tree()
763 9, 7, CLK_DIVIDER_ONE_BASED); in mpc512x_clk_setup_clock_tree()
769 CLK_DIVIDER_ONE_BASED); in mpc512x_clk_setup_clock_tree()
/linux-4.1.27/include/linux/
Dclk-provider.h356 #define CLK_DIVIDER_ONE_BASED BIT(0) macro
/linux-4.1.27/drivers/clk/st/
Dclkgen-pll.c575 div->flags = CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO; in clkgen_odf_register()