Searched refs:CHIPGCR (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/drivers/net/ethernet/via/
H A Dvia-velocity.c247 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR); mac_wol_reset()
248 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR); mac_wol_reset()
915 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR); velocity_set_media_mode()
926 u8 CHIPGCR; velocity_set_media_mode() local
931 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR velocity_set_media_mode()
936 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR); velocity_set_media_mode()
938 CHIPGCR = readb(&regs->CHIPGCR); velocity_set_media_mode()
941 CHIPGCR |= CHIPGCR_FCGMII; velocity_set_media_mode()
943 CHIPGCR &= ~CHIPGCR_FCGMII; velocity_set_media_mode()
946 CHIPGCR |= CHIPGCR_FCFDX; velocity_set_media_mode()
947 writeb(CHIPGCR, &regs->CHIPGCR); velocity_set_media_mode()
952 CHIPGCR &= ~CHIPGCR_FCFDX; velocity_set_media_mode()
954 writeb(CHIPGCR, &regs->CHIPGCR); velocity_set_media_mode()
3108 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR); velocity_set_wol()
3112 GCR = readb(&regs->CHIPGCR); velocity_set_wol()
3114 writeb(GCR, &regs->CHIPGCR); velocity_set_wol()
H A Dvia-velocity.h848 * Bits in CHIPGCR register
1081 volatile u8 CHIPGCR; member in struct:mac_regs

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