| /linux-4.1.27/drivers/staging/emxx_udc/ |
| D | emxx_udc.h | 102 #define BIT15 0x00008000 macro
155 #define SOF_STATUS BIT15
184 #define EP7_INT BIT15
211 #define EP7_EN BIT15
252 #define EP0_OUT_NAK_INT BIT15
269 #define EP0_STATUS_RW_BIT (BIT16|BIT15|BIT11|0xFF)
273 #define EP0_OUT_NAK_EN BIT15
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| /linux-4.1.27/drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_hw.h | 194 #define CAM_VALID BIT15
227 #define IMR_TXFOVW BIT15
260 #define TPPoll_StopHCCA BIT15
390 #define RRSR_MCS3 BIT15
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| D | rtl_cam.c | 134 usConfig |= BIT15 | (KeyType<<2); in setKey()
136 usConfig |= BIT15 | (KeyType<<2) | KeyIndex; in setKey()
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| /linux-4.1.27/drivers/net/wireless/rtlwifi/btcoexist/ |
| D | halbt_precomp.h | 63 #define BIT15 0x00008000 macro
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| /linux-4.1.27/drivers/staging/rtl8188eu/hal/ |
| D | odm_RTL8188E.c | 149 phy_set_bb_reg(adapter, 0x858, BIT15|BIT14, 2); in dm_fast_training_init()
349 BIT15, 0); in rtl88eu_dm_antenna_diversity()
362 BIT15, 1); in rtl88eu_dm_antenna_diversity()
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| /linux-4.1.27/drivers/staging/rtl8188eu/include/ |
| D | rtl8188e_spec.h | 41 #define BIT15 0x00008000 macro
566 #define RRSR_MCS3 BIT15
582 #define CAM_VALID BIT15
628 #define IMR_HSISR_IND_ON_INT_88E BIT15 /* HSISR Indicator (HSIMR & HSISR is true, this bit is set …
657 #define IMR_BCNDERR2_88E BIT15 /* Beacon DMA Error Int 2 */
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| D | osdep_service.h | 103 #define BIT15 0x00008000 macro
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| /linux-4.1.27/include/uapi/linux/ |
| D | synclink.h | 33 #define BIT15 0x8000 macro
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| /linux-4.1.27/drivers/net/ethernet/cirrus/ |
| D | cs89x0.h | 464 #define BIT15 0x8000 macro
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| /linux-4.1.27/drivers/tty/ |
| D | synclink.c | 558 #define MISCSTATUS_RXC_LATCHED BIT15
578 #define SICR_RXC_ACTIVE BIT15
580 #define SICR_RXC (BIT15|BIT14)
635 #define DICR_MASTER BIT15
1842 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT15) | BIT14)); in shutdown()
4719 RegValue |= BIT15; in usc_set_sdlc_mode()
4721 RegValue |= BIT15 | BIT14; in usc_set_sdlc_mode()
4763 case HDLC_ENCODING_BIPHASE_MARK: RegValue |= BIT15; break; in usc_set_sdlc_mode()
4764 case HDLC_ENCODING_BIPHASE_SPACE: RegValue |= BIT15 | BIT13; break; in usc_set_sdlc_mode()
4765 case HDLC_ENCODING_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14; break; in usc_set_sdlc_mode()
[all …]
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| D | synclink_gt.c | 219 #define desc_complete(a) (le16_to_cpu((a).status) & BIT15)
2145 set_desc_status(info->rbufs[i], BIT15 | (reg >> 8)); in isr_rxdata()
4253 val = BIT15 + BIT14 + BIT0; in async_mode()
4305 val |= BIT15 + BIT13; in sync_mode()
4308 case MGSL_MODE_BISYNC: val |= BIT15; break; in sync_mode()
4380 val |= BIT15 + BIT13; in sync_mode()
4383 case MGSL_MODE_BISYNC: val |= BIT15; break; in sync_mode()
4489 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0); in sync_mode()
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| /linux-4.1.27/drivers/scsi/ |
| D | dc395x.h | 60 #define BIT15 0x00008000 macro
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| /linux-4.1.27/drivers/staging/rtl8192u/ |
| D | r8192U_hw.h | 322 #define RRSR_MCS3 BIT15
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| D | r8192U.h | 61 #define BIT15 0x00008000 macro
109 #define COMP_PHY BIT15
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| D | r8192U_core.c | 4877 usConfig |= BIT15 | (KeyType<<2); in setKey()
4879 usConfig |= BIT15 | (KeyType<<2) | KeyIndex; in setKey()
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| /linux-4.1.27/drivers/staging/rtl8192e/ |
| D | rtl819x_Qos.h | 37 #define BIT15 0x00008000 macro
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| /linux-4.1.27/drivers/staging/rtl8192u/ieee80211/ |
| D | rtl819x_Qos.h | 19 #define BIT15 0x00008000 macro
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| /linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8192de/ |
| D | reg.h | 399 #define RRSR_MCS3 BIT15
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| /linux-4.1.27/drivers/scsi/lpfc/ |
| D | lpfc_hw4.h | 689 #define LPFC_SLI4_INTR15 BIT15
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| /linux-4.1.27/drivers/char/pcmcia/ |
| D | synclink_cs.c | 290 #define IRQ_BREAK_ON BIT15 // rx break detected
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