Searched defs:post_div (Results 1 - 12 of 12) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/radeon/
H A Dradeon_clocks.c38 uint32_t fb_div, ref_div, post_div, sclk; radeon_legacy_get_engine_clock() local
68 uint32_t fb_div, ref_div, post_div, mclk; radeon_legacy_get_memory_clock() local
389 int fb_div, post_div; radeon_legacy_set_engine_clock() local
346 calc_eng_mem_clock(struct radeon_device *rdev, uint32_t req_clock, int *fb_div, int *post_div) calc_eng_mem_clock() argument
H A Dradeon_legacy_crtc.c756 } *post_div, post_divs[] = { radeon_set_pll() local
H A Dradeon_uvd.c873 unsigned post_div = vco_freq / target_freq; radeon_uvd_calc_upll_post_div() local
H A Drs780_dpm.c988 u32 post_div = ((func_cntl & SPLL_SW_HILEN_MASK) >> SPLL_SW_HILEN_SHIFT) + 1 + rs780_dpm_debugfs_print_current_performance_level() local
1010 u32 post_div = ((func_cntl & SPLL_SW_HILEN_MASK) >> SPLL_SW_HILEN_SHIFT) + 1 + rs780_dpm_get_current_sclk() local
H A Datombios_crtc.c1063 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; atombios_crtc_set_pll() local
814 atombios_crtc_program_pll(struct drm_crtc *crtc, u32 crtc_id, int pll_id, u32 encoder_mode, u32 encoder_id, u32 clock, u32 ref_div, u32 fb_div, u32 frac_fb_div, u32 post_div, int bpc, bool ss_enabled, struct radeon_atom_ss *ss) atombios_crtc_program_pll() argument
H A Dradeon_legacy_tv.c869 int post_div; get_post_div() local
H A Dradeon_display.c897 static void avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, avivo_get_fb_ref_div() argument
940 unsigned post_div_min, post_div_max, post_div; radeon_compute_pll_avivo() local
1103 uint32_t post_div; radeon_compute_pll_legacy() local
H A Dradeon_mode.h171 uint32_t post_div; member in struct:radeon_pll
582 u32 post_div; member in struct:atom_clock_dividers
622 u32 post_div; member in struct:atom_mpll_param
/linux-4.1.27/drivers/media/tuners/
H A Dtda18271-maps.c1067 tda18271_lookup_pll_map(struct dvb_frontend *fe, enum tda18271_map_type map_type, u32 *freq, u8 *post_div, u8 *div) tda18271_lookup_pll_map() argument
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dmcp77.c53 u32 post_div = 0; read_pll() local
/linux-4.1.27/drivers/video/fbdev/aty/
H A Dradeon_base.c1418 } *post_div, radeon_calc_pll_regs() local
H A Dradeonfb.h232 int post_div; member in struct:radeon_regs

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