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Searched defs:R10000_LLSC_WAR (Results 1 – 14 of 14) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/mach-sead3/
Dwar.h21 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-tx49xx/
Dwar.h21 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip22/
Dwar.h25 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-rc32434/
Dwar.h21 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip28/
Dwar.h21 #define R10000_LLSC_WAR 1 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip32/
Dwar.h21 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip27/
Dwar.h21 #define R10000_LLSC_WAR 1 macro
/linux-4.1.27/arch/mips/include/asm/mach-malta/
Dwar.h21 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-rm/
Dwar.h25 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-generic/
Dwar.h21 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-cavium-octeon/
Dwar.h22 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-pmcs-msp71xx/
Dwar.h21 #define R10000_LLSC_WAR 0 macro
Dmsp_regops.h56 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-sibyte/
Dwar.h37 #define R10000_LLSC_WAR 0 macro