Lines Matching refs:regmap_update_bits
378 regmap_update_bits(regs, CCSR_SSI_SIER, in fsl_ssi_rxtx_config()
381 regmap_update_bits(regs, CCSR_SSI_SRCR, in fsl_ssi_rxtx_config()
384 regmap_update_bits(regs, CCSR_SSI_STCR, in fsl_ssi_rxtx_config()
388 regmap_update_bits(regs, CCSR_SSI_SRCR, in fsl_ssi_rxtx_config()
390 regmap_update_bits(regs, CCSR_SSI_STCR, in fsl_ssi_rxtx_config()
392 regmap_update_bits(regs, CCSR_SSI_SIER, in fsl_ssi_rxtx_config()
451 regmap_update_bits(regs, CCSR_SSI_SCR, scr, 0); in fsl_ssi_config()
472 regmap_update_bits(regs, CCSR_SSI_SIER, vals->sier, vals->sier); in fsl_ssi_config()
473 regmap_update_bits(regs, CCSR_SSI_SRCR, vals->srcr, vals->srcr); in fsl_ssi_config()
474 regmap_update_bits(regs, CCSR_SSI_STCR, vals->stcr, vals->stcr); in fsl_ssi_config()
497 regmap_update_bits(regs, CCSR_SSI_SRCR, srcr, 0); in fsl_ssi_config()
498 regmap_update_bits(regs, CCSR_SSI_STCR, stcr, 0); in fsl_ssi_config()
499 regmap_update_bits(regs, CCSR_SSI_SIER, sier, 0); in fsl_ssi_config()
505 regmap_update_bits(regs, CCSR_SSI_SCR, vals->scr, vals->scr); in fsl_ssi_config()
578 regmap_update_bits(regs, CCSR_SSI_SCR, in fsl_ssi_setup_ac97()
726 regmap_update_bits(regs, CCSR_SSI_STCCR, mask, stccr); in fsl_ssi_set_bclk()
728 regmap_update_bits(regs, CCSR_SSI_SRCCR, mask, stccr); in fsl_ssi_set_bclk()
814 regmap_update_bits(regs, CCSR_SSI_SCR, in fsl_ssi_hw_params()
832 regmap_update_bits(regs, CCSR_SSI_STCCR, CCSR_SSI_SxCCR_WL_MASK, in fsl_ssi_hw_params()
835 regmap_update_bits(regs, CCSR_SSI_SRCCR, CCSR_SSI_SxCCR_WL_MASK, in fsl_ssi_hw_params()
893 regmap_update_bits(regs, CCSR_SSI_STCCR, in _fsl_ssi_set_dai_fmt()
896 regmap_update_bits(regs, CCSR_SSI_SRCCR, in _fsl_ssi_set_dai_fmt()
1009 regmap_update_bits(regs, CCSR_SSI_SRCR, CCSR_SSI_SRCR_RFEN1, in _fsl_ssi_set_dai_fmt()
1011 regmap_update_bits(regs, CCSR_SSI_STCR, CCSR_SSI_STCR_TFEN1, in _fsl_ssi_set_dai_fmt()
1013 regmap_update_bits(regs, CCSR_SSI_SCR, CCSR_SSI_SCR_TCH_EN, in _fsl_ssi_set_dai_fmt()
1054 regmap_update_bits(regs, CCSR_SSI_STCCR, CCSR_SSI_SxCCR_DC_MASK, in fsl_ssi_set_dai_tdm_slot()
1056 regmap_update_bits(regs, CCSR_SSI_SRCCR, CCSR_SSI_SxCCR_DC_MASK, in fsl_ssi_set_dai_tdm_slot()
1064 regmap_update_bits(regs, CCSR_SSI_SCR, CCSR_SSI_SCR_SSIEN, in fsl_ssi_set_dai_tdm_slot()
1070 regmap_update_bits(regs, CCSR_SSI_SCR, CCSR_SSI_SCR_SSIEN, val); in fsl_ssi_set_dai_tdm_slot()
1218 regmap_update_bits(regs, CCSR_SSI_SACNT, CCSR_SSI_SACNT_RDWR_MASK, in fsl_ssi_ac97_write()
1244 regmap_update_bits(regs, CCSR_SSI_SACNT, CCSR_SSI_SACNT_RDWR_MASK, in fsl_ssi_ac97_read()
1605 regmap_update_bits(regs, CCSR_SSI_SFCSR, in fsl_ssi_resume()