81 	u32 val;  in tco_timer_start()  local
85 	val = inl(TCO_CNT(tcobase));  in tco_timer_start()
86 	val &= ~TCO_CNT_TCOHALT;  in tco_timer_start()
87 	outl(val, TCO_CNT(tcobase));  in tco_timer_start()
93 	u32 val;  in tco_timer_stop()  local
97 	val = inl(TCO_CNT(tcobase));  in tco_timer_stop()
98 	val |= TCO_CNT_TCOHALT;  in tco_timer_stop()
99 	outl(val, TCO_CNT(tcobase));  in tco_timer_stop()
117 	u8 val;  in tco_timer_set_heartbeat()  local
134 	val = inb(TCO_TMR(tcobase));  in tco_timer_set_heartbeat()
135 	val &= 0xc0;  in tco_timer_set_heartbeat()
136 	val |= tmrval;  in tco_timer_set_heartbeat()
137 	outb(val, TCO_TMR(tcobase));  in tco_timer_set_heartbeat()
138 	val = inb(TCO_TMR(tcobase));  in tco_timer_set_heartbeat()
140 	if ((val & 0x3f) != tmrval)  in tco_timer_set_heartbeat()
310 	u32 val;  in nv_tco_getdevice()  local
324 	pci_read_config_dword(tco_pci, 0x64, &val);  in nv_tco_getdevice()
325 	val &= 0xffff;  in nv_tco_getdevice()
326 	if (val == 0x0001 || val == 0x0000) {  in nv_tco_getdevice()
331 	val &= 0xff00;  in nv_tco_getdevice()
332 	tcobase = val + 0x40;  in nv_tco_getdevice()
355 	val = inl(MCP51_SMI_EN(tcobase));  in nv_tco_getdevice()
356 	val &= ~MCP51_SMI_EN_TCO;  in nv_tco_getdevice()
357 	outl(val, MCP51_SMI_EN(tcobase));  in nv_tco_getdevice()
358 	val = inl(MCP51_SMI_EN(tcobase));  in nv_tco_getdevice()
360 	if (val & MCP51_SMI_EN_TCO) {  in nv_tco_getdevice()
366 	pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);  in nv_tco_getdevice()
367 	val |= MCP51_SMBUS_SETUP_B_TCO_REBOOT;  in nv_tco_getdevice()
368 	pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);  in nv_tco_getdevice()
369 	pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);  in nv_tco_getdevice()
370 	if (!(val & MCP51_SMBUS_SETUP_B_TCO_REBOOT)) {  in nv_tco_getdevice()
430 	u32 val;  in nv_tco_cleanup()  local
437 	pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);  in nv_tco_cleanup()
438 	val &= ~MCP51_SMBUS_SETUP_B_TCO_REBOOT;  in nv_tco_cleanup()
439 	pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);  in nv_tco_cleanup()
440 	pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);  in nv_tco_cleanup()
441 	if (val & MCP51_SMBUS_SETUP_B_TCO_REBOOT) {  in nv_tco_cleanup()
460 	u32 val;  in nv_tco_shutdown()  local
466 	pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);  in nv_tco_shutdown()
467 	val &= ~MCP51_SMBUS_SETUP_B_TCO_REBOOT;  in nv_tco_shutdown()
468 	pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);  in nv_tco_shutdown()