629 	temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);  in xhci_run()
636 	temp = readl(&xhci->ir_set->irq_control);  in xhci_run()
639 	writel(temp, &xhci->ir_set->irq_control);  in xhci_run()
648 	temp = readl(&xhci->ir_set->irq_pending);  in xhci_run()
651 			xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));  in xhci_run()
652 	writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);  in xhci_run()
716 	temp = readl(&xhci->ir_set->irq_pending);  in xhci_stop()
717 	writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);  in xhci_stop()
769 	xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);  in xhci_save_registers()
770 	xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);  in xhci_save_registers()
771 	xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);  in xhci_save_registers()
772 	xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);  in xhci_save_registers()
773 	xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);  in xhci_save_registers()
782 	writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);  in xhci_restore_registers()
783 	xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);  in xhci_restore_registers()
784 	xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);  in xhci_restore_registers()
785 	writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);  in xhci_restore_registers()
786 	writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);  in xhci_restore_registers()
1049 		temp = readl(&xhci->ir_set->irq_pending);  in xhci_resume()
1050 		writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);  in xhci_resume()