Lines Matching refs:writeb
401 writeb(0x10, p + OCT_REG_CR_OFF); in sbs_init()
403 writeb(0x0, p + OCT_REG_CR_OFF); in sbs_init()
406 writeb(0x4, p + OCT_REG_CR_OFF); in sbs_init()
423 writeb(0, p + OCT_REG_CR_OFF); in sbs_exit()
765 writeb(readb(p + offset + NI8430_PORTCON) | NI8430_PORTCON_TXVR_ENABLE, in pci_ni8430_setup()
1799 writeb(0x00, p + 0x8f); /*MPIOINT[7:0]*/ in pci_xr17v35x_setup()
1800 writeb(0x00, p + 0x90); /*MPIOLVL[7:0]*/ in pci_xr17v35x_setup()
1801 writeb(0x00, p + 0x91); /*MPIO3T[7:0]*/ in pci_xr17v35x_setup()
1802 writeb(0x00, p + 0x92); /*MPIOINV[7:0]*/ in pci_xr17v35x_setup()
1803 writeb(0x00, p + 0x93); /*MPIOSEL[7:0]*/ in pci_xr17v35x_setup()
1804 writeb(0x00, p + 0x94); /*MPIOOD[7:0]*/ in pci_xr17v35x_setup()
1805 writeb(0x00, p + 0x95); /*MPIOINT[15:8]*/ in pci_xr17v35x_setup()
1806 writeb(0x00, p + 0x96); /*MPIOLVL[15:8]*/ in pci_xr17v35x_setup()
1807 writeb(0x00, p + 0x97); /*MPIO3T[15:8]*/ in pci_xr17v35x_setup()
1808 writeb(0x00, p + 0x98); /*MPIOINV[15:8]*/ in pci_xr17v35x_setup()
1809 writeb(0x00, p + 0x99); /*MPIOSEL[15:8]*/ in pci_xr17v35x_setup()
1810 writeb(0x00, p + 0x9a); /*MPIOOD[15:8]*/ in pci_xr17v35x_setup()
1812 writeb(0x00, p + UART_EXAR_8XMODE); in pci_xr17v35x_setup()
1813 writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR); in pci_xr17v35x_setup()
1814 writeb(128, p + UART_EXAR_TXTRG); in pci_xr17v35x_setup()
1815 writeb(128, p + UART_EXAR_RXTRG); in pci_xr17v35x_setup()
1846 writeb(0x78, p + 0x90); /* MPIOLVL[7:0] */ in pci_fastcom335_setup()
1847 writeb(0x00, p + 0x92); /* MPIOINV[7:0] */ in pci_fastcom335_setup()
1848 writeb(0x00, p + 0x93); /* MPIOSEL[7:0] */ in pci_fastcom335_setup()
1852 writeb(0x00, p + 0x90); /* MPIOLVL[7:0] */ in pci_fastcom335_setup()
1853 writeb(0xc0, p + 0x92); /* MPIOINV[7:0] */ in pci_fastcom335_setup()
1854 writeb(0xc0, p + 0x93); /* MPIOSEL[7:0] */ in pci_fastcom335_setup()
1857 writeb(0x00, p + 0x8f); /* MPIOINT[7:0] */ in pci_fastcom335_setup()
1858 writeb(0x00, p + 0x91); /* MPIO3T[7:0] */ in pci_fastcom335_setup()
1859 writeb(0x00, p + 0x94); /* MPIOOD[7:0] */ in pci_fastcom335_setup()
1861 writeb(0x00, p + UART_EXAR_8XMODE); in pci_fastcom335_setup()
1862 writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR); in pci_fastcom335_setup()
1863 writeb(32, p + UART_EXAR_TXTRG); in pci_fastcom335_setup()
1864 writeb(32, p + UART_EXAR_RXTRG); in pci_fastcom335_setup()