Lines Matching refs:pctrl
96 struct pinctrl_dev *pctrl; member
132 static int pm8xxx_read_bank(struct pm8xxx_gpio *pctrl, in pm8xxx_read_bank() argument
138 ret = regmap_write(pctrl->regmap, pin->reg, val); in pm8xxx_read_bank()
140 dev_err(pctrl->dev, "failed to select bank %d\n", bank); in pm8xxx_read_bank()
144 ret = regmap_read(pctrl->regmap, pin->reg, &val); in pm8xxx_read_bank()
146 dev_err(pctrl->dev, "failed to read register %d\n", bank); in pm8xxx_read_bank()
153 static int pm8xxx_write_bank(struct pm8xxx_gpio *pctrl, in pm8xxx_write_bank() argument
163 ret = regmap_write(pctrl->regmap, pin->reg, val); in pm8xxx_write_bank()
165 dev_err(pctrl->dev, "failed to write register\n"); in pm8xxx_write_bank()
172 struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_get_groups_count() local
174 return pctrl->npins; in pm8xxx_get_groups_count()
189 struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_get_group_pins() local
191 *pins = &pctrl->desc.pins[group].number; in pm8xxx_get_group_pins()
221 struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_get_function_groups() local
224 *num_groups = pctrl->npins; in pm8xxx_get_function_groups()
232 struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_pinmux_set_mux() local
233 struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data; in pm8xxx_pinmux_set_mux()
239 pm8xxx_write_bank(pctrl, pin, 4, val); in pm8xxx_pinmux_set_mux()
255 struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_pin_config_get() local
256 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_pin_config_get()
311 struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_pin_config_set() local
312 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_pin_config_set()
338 dev_err(pctrl->dev, "invalid pull-up strength\n"); in pm8xxx_pin_config_set()
368 dev_err(pctrl->dev, "invalid drive strength\n"); in pm8xxx_pin_config_set()
383 dev_err(pctrl->dev, in pm8xxx_pin_config_set()
393 pm8xxx_write_bank(pctrl, pin, 0, val); in pm8xxx_pin_config_set()
400 pm8xxx_write_bank(pctrl, pin, 1, val); in pm8xxx_pin_config_set()
405 pm8xxx_write_bank(pctrl, pin, 2, val); in pm8xxx_pin_config_set()
411 pm8xxx_write_bank(pctrl, pin, 3, val); in pm8xxx_pin_config_set()
416 pm8xxx_write_bank(pctrl, pin, 4, val); in pm8xxx_pin_config_set()
423 pm8xxx_write_bank(pctrl, pin, 5, val); in pm8xxx_pin_config_set()
446 struct pm8xxx_gpio *pctrl = container_of(chip, struct pm8xxx_gpio, chip); in pm8xxx_gpio_direction_input() local
447 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_gpio_direction_input()
453 pm8xxx_write_bank(pctrl, pin, 1, val); in pm8xxx_gpio_direction_input()
462 struct pm8xxx_gpio *pctrl = container_of(chip, struct pm8xxx_gpio, chip); in pm8xxx_gpio_direction_output() local
463 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_gpio_direction_output()
473 pm8xxx_write_bank(pctrl, pin, 1, val); in pm8xxx_gpio_direction_output()
480 struct pm8xxx_gpio *pctrl = container_of(chip, struct pm8xxx_gpio, chip); in pm8xxx_gpio_get() local
481 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_gpio_get()
498 struct pm8xxx_gpio *pctrl = container_of(chip, struct pm8xxx_gpio, chip); in pm8xxx_gpio_set() local
499 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_gpio_set()
508 pm8xxx_write_bank(pctrl, pin, 1, val); in pm8xxx_gpio_set()
527 struct pm8xxx_gpio *pctrl = container_of(chip, struct pm8xxx_gpio, chip); in pm8xxx_gpio_to_irq() local
528 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_gpio_to_irq()
542 struct pm8xxx_gpio *pctrl = container_of(chip, struct pm8xxx_gpio, chip); in pm8xxx_gpio_dbg_show_one() local
543 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_gpio_dbg_show_one()
601 static int pm8xxx_pin_populate(struct pm8xxx_gpio *pctrl, in pm8xxx_pin_populate() argument
606 val = pm8xxx_read_bank(pctrl, pin, 0); in pm8xxx_pin_populate()
612 val = pm8xxx_read_bank(pctrl, pin, 1); in pm8xxx_pin_populate()
620 val = pm8xxx_read_bank(pctrl, pin, 2); in pm8xxx_pin_populate()
630 val = pm8xxx_read_bank(pctrl, pin, 3); in pm8xxx_pin_populate()
637 val = pm8xxx_read_bank(pctrl, pin, 4); in pm8xxx_pin_populate()
643 val = pm8xxx_read_bank(pctrl, pin, 5); in pm8xxx_pin_populate()
666 struct pm8xxx_gpio *pctrl; in pm8xxx_gpio_probe() local
670 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); in pm8xxx_gpio_probe()
671 if (!pctrl) in pm8xxx_gpio_probe()
674 pctrl->dev = &pdev->dev; in pm8xxx_gpio_probe()
675 pctrl->npins = (unsigned long)of_device_get_match_data(&pdev->dev); in pm8xxx_gpio_probe()
677 pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL); in pm8xxx_gpio_probe()
678 if (!pctrl->regmap) { in pm8xxx_gpio_probe()
683 pctrl->desc = pm8xxx_pinctrl_desc; in pm8xxx_gpio_probe()
684 pctrl->desc.npins = pctrl->npins; in pm8xxx_gpio_probe()
687 pctrl->desc.npins, in pm8xxx_gpio_probe()
694 pctrl->desc.npins, in pm8xxx_gpio_probe()
700 for (i = 0; i < pctrl->desc.npins; i++) { in pm8xxx_gpio_probe()
709 ret = pm8xxx_pin_populate(pctrl, &pin_data[i]); in pm8xxx_gpio_probe()
717 pctrl->desc.pins = pins; in pm8xxx_gpio_probe()
719 pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_gpio_bindings); in pm8xxx_gpio_probe()
720 pctrl->desc.custom_params = pm8xxx_gpio_bindings; in pm8xxx_gpio_probe()
722 pctrl->desc.custom_conf_items = pm8xxx_conf_items; in pm8xxx_gpio_probe()
725 pctrl->pctrl = pinctrl_register(&pctrl->desc, &pdev->dev, pctrl); in pm8xxx_gpio_probe()
726 if (IS_ERR(pctrl->pctrl)) { in pm8xxx_gpio_probe()
728 return PTR_ERR(pctrl->pctrl); in pm8xxx_gpio_probe()
731 pctrl->chip = pm8xxx_gpio_template; in pm8xxx_gpio_probe()
732 pctrl->chip.base = -1; in pm8xxx_gpio_probe()
733 pctrl->chip.dev = &pdev->dev; in pm8xxx_gpio_probe()
734 pctrl->chip.of_node = pdev->dev.of_node; in pm8xxx_gpio_probe()
735 pctrl->chip.of_gpio_n_cells = 2; in pm8xxx_gpio_probe()
736 pctrl->chip.label = dev_name(pctrl->dev); in pm8xxx_gpio_probe()
737 pctrl->chip.ngpio = pctrl->npins; in pm8xxx_gpio_probe()
738 ret = gpiochip_add(&pctrl->chip); in pm8xxx_gpio_probe()
744 ret = gpiochip_add_pin_range(&pctrl->chip, in pm8xxx_gpio_probe()
745 dev_name(pctrl->dev), in pm8xxx_gpio_probe()
746 0, 0, pctrl->chip.ngpio); in pm8xxx_gpio_probe()
748 dev_err(pctrl->dev, "failed to add pin range\n"); in pm8xxx_gpio_probe()
752 platform_set_drvdata(pdev, pctrl); in pm8xxx_gpio_probe()
759 gpiochip_remove(&pctrl->chip); in pm8xxx_gpio_probe()
762 pinctrl_unregister(pctrl->pctrl); in pm8xxx_gpio_probe()
769 struct pm8xxx_gpio *pctrl = platform_get_drvdata(pdev); in pm8xxx_gpio_remove() local
771 gpiochip_remove(&pctrl->chip); in pm8xxx_gpio_remove()
773 pinctrl_unregister(pctrl->pctrl); in pm8xxx_gpio_remove()