Lines Matching refs:rtlpriv
48 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_read_dword_dbi() local
51 rtl_write_word(rtlpriv, REG_DBI_CTRL, (offset & 0xFFC)); in rtl92de_read_dword_dbi()
52 rtl_write_byte(rtlpriv, REG_DBI_FLAG, BIT(1) | direct); in rtl92de_read_dword_dbi()
54 value = rtl_read_dword(rtlpriv, REG_DBI_RDATA); in rtl92de_read_dword_dbi()
61 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_write_dword_dbi() local
63 rtl_write_word(rtlpriv, REG_DBI_CTRL, ((offset & 0xFFC) | 0xF000)); in rtl92de_write_dword_dbi()
64 rtl_write_dword(rtlpriv, REG_DBI_WDATA, value); in rtl92de_write_dword_dbi()
65 rtl_write_byte(rtlpriv, REG_DBI_FLAG, BIT(0) | direct); in rtl92de_write_dword_dbi()
72 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92de_set_bcn_ctrl_reg() local
76 rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8) rtlpci->reg_bcn_ctrl_val); in _rtl92de_set_bcn_ctrl_reg()
81 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92de_stop_tx_beacon() local
84 tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2); in _rtl92de_stop_tx_beacon()
85 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte & (~BIT(6))); in _rtl92de_stop_tx_beacon()
86 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xff); in _rtl92de_stop_tx_beacon()
87 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0x64); in _rtl92de_stop_tx_beacon()
88 tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2); in _rtl92de_stop_tx_beacon()
90 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte); in _rtl92de_stop_tx_beacon()
95 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92de_resume_tx_beacon() local
98 tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2); in _rtl92de_resume_tx_beacon()
99 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte | BIT(6)); in _rtl92de_resume_tx_beacon()
100 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0x0a); in _rtl92de_resume_tx_beacon()
101 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92de_resume_tx_beacon()
102 tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2); in _rtl92de_resume_tx_beacon()
104 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte); in _rtl92de_resume_tx_beacon()
119 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_get_hw_reg() local
134 rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RF_STATE, in rtl92de_get_hw_reg()
139 val_rcr = rtl_read_dword(rtlpriv, REG_RCR); in rtl92de_get_hw_reg()
156 *ptsf_high = rtl_read_dword(rtlpriv, (REG_TSFTR + 4)); in rtl92de_get_hw_reg()
157 *ptsf_low = rtl_read_dword(rtlpriv, REG_TSFTR); in rtl92de_get_hw_reg()
162 *((bool *)(val)) = rtlpriv->dm.interrupt_migration; in rtl92de_get_hw_reg()
165 *((bool *)(val)) = rtlpriv->dm.disable_tx_int; in rtl92de_get_hw_reg()
168 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in rtl92de_get_hw_reg()
176 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_set_hw_reg() local
187 rtl_write_byte(rtlpriv, (REG_MACID + idx), in rtl92de_set_hw_reg()
199 rtl_write_byte(rtlpriv, REG_RRSR, rate_cfg & 0xff); in rtl92de_set_hw_reg()
200 rtl_write_byte(rtlpriv, REG_RRSR + 1, in rtl92de_set_hw_reg()
207 rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, in rtl92de_set_hw_reg()
213 rtl_write_byte(rtlpriv, (REG_BSSID + idx), in rtl92de_set_hw_reg()
218 rtl_write_byte(rtlpriv, REG_SIFS_CTX + 1, val[0]); in rtl92de_set_hw_reg()
219 rtl_write_byte(rtlpriv, REG_SIFS_TRX + 1, val[1]); in rtl92de_set_hw_reg()
220 rtl_write_byte(rtlpriv, REG_SPEC_SIFS + 1, val[0]); in rtl92de_set_hw_reg()
221 rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]); in rtl92de_set_hw_reg()
223 rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM, in rtl92de_set_hw_reg()
226 rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM, in rtl92de_set_hw_reg()
232 RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, in rtl92de_set_hw_reg()
234 rtl_write_byte(rtlpriv, REG_SLOT, val[0]); in rtl92de_set_hw_reg()
236 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92de_set_hw_reg()
248 rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_tmp); in rtl92de_set_hw_reg()
263 RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, in rtl92de_set_hw_reg()
266 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, in rtl92de_set_hw_reg()
275 mac->min_space_cfg = rtlpriv->rtlhal.minspace_cfg; in rtl92de_set_hw_reg()
277 RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, in rtl92de_set_hw_reg()
280 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, in rtl92de_set_hw_reg()
311 rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, regtoSet); in rtl92de_set_hw_reg()
312 RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, in rtl92de_set_hw_reg()
322 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ACM_CTRL, in rtl92de_set_hw_reg()
331 u8 acm_ctrl = rtl_read_byte(rtlpriv, REG_ACMHWCTRL); in rtl92de_set_hw_reg()
346 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, in rtl92de_set_hw_reg()
363 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in rtl92de_set_hw_reg()
368 RT_TRACE(rtlpriv, COMP_QOS, DBG_TRACE, in rtl92de_set_hw_reg()
371 rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl); in rtl92de_set_hw_reg()
375 rtl_write_dword(rtlpriv, REG_RCR, ((u32 *) (val))[0]); in rtl92de_set_hw_reg()
381 rtl_write_word(rtlpriv, REG_RL, in rtl92de_set_hw_reg()
387 rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, (BIT(0) | BIT(1))); in rtl92de_set_hw_reg()
399 rtl_write_byte(rtlpriv, REG_SECCFG, *val); in rtl92de_set_hw_reg()
415 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92de_set_hw_reg()
417 tmp_regcr = rtl_read_byte(rtlpriv, REG_CR + 1); in rtl92de_set_hw_reg()
418 rtl_write_byte(rtlpriv, REG_CR + 1, in rtl92de_set_hw_reg()
422 tmp_reg422 = rtl_read_byte(rtlpriv, in rtl92de_set_hw_reg()
426 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, in rtl92de_set_hw_reg()
432 rtl_write_byte(rtlpriv, in rtl92de_set_hw_reg()
435 rtl_write_byte(rtlpriv, REG_CR + 1, in rtl92de_set_hw_reg()
443 u2btmp = rtl_read_word(rtlpriv, REG_BCN_PSR_RPT); in rtl92de_set_hw_reg()
445 rtl_write_word(rtlpriv, REG_BCN_PSR_RPT, (u2btmp | in rtl92de_set_hw_reg()
455 rtl_write_dword(rtlpriv, REG_TSFTR, in rtl92de_set_hw_reg()
457 rtl_write_dword(rtlpriv, REG_TSFTR + 4, in rtl92de_set_hw_reg()
473 rtl_write_dword(rtlpriv, REG_INT_MIG, 0xfe000fa0); in rtl92de_set_hw_reg()
474 rtlpriv->dm.interrupt_migration = int_migration; in rtl92de_set_hw_reg()
477 rtl_write_dword(rtlpriv, REG_INT_MIG, 0); in rtl92de_set_hw_reg()
478 rtlpriv->dm.interrupt_migration = int_migration; in rtl92de_set_hw_reg()
492 rtlpriv->cfg->ops->update_interrupt_mask(hw, 0, in rtl92de_set_hw_reg()
494 rtlpriv->dm.disable_tx_int = disable_ac_int; in rtl92de_set_hw_reg()
497 rtlpriv->cfg->ops->update_interrupt_mask(hw, in rtl92de_set_hw_reg()
499 rtlpriv->dm.disable_tx_int = disable_ac_int; in rtl92de_set_hw_reg()
504 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in rtl92de_set_hw_reg()
512 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92de_llt_write() local
518 rtl_write_dword(rtlpriv, REG_LLT_INIT, value); in _rtl92de_llt_write()
520 value = rtl_read_dword(rtlpriv, REG_LLT_INIT); in _rtl92de_llt_write()
524 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in _rtl92de_llt_write()
536 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92de_llt_table_init() local
544 if (rtlpriv->rtlhal.macphymode == SINGLEMAC_SINGLEPHY) { in _rtl92de_llt_table_init()
559 rtl_write_byte(rtlpriv, REG_RQPN_NPQ, value8); in _rtl92de_llt_table_init()
560 rtl_write_dword(rtlpriv, REG_RQPN, value32); in _rtl92de_llt_table_init()
564 rtl_write_dword(rtlpriv, REG_TRXFF_BNDY, in _rtl92de_llt_table_init()
565 (rtl_read_word(rtlpriv, REG_TRXFF_BNDY + 2) << 16 | in _rtl92de_llt_table_init()
570 rtl_write_byte(rtlpriv, REG_TDECTRL + 1, txpktbuf_bndy); in _rtl92de_llt_table_init()
574 rtl_write_byte(rtlpriv, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy); in _rtl92de_llt_table_init()
575 rtl_write_byte(rtlpriv, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy); in _rtl92de_llt_table_init()
579 rtl_write_byte(rtlpriv, 0x45D, txpktbuf_bndy); in _rtl92de_llt_table_init()
585 rtl_write_byte(rtlpriv, REG_PBP, 0x11); in _rtl92de_llt_table_init()
588 rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, 0x4); in _rtl92de_llt_table_init()
639 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92de_init_mac() local
650 rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x00); in _rtl92de_init_mac()
651 rtl_write_byte(rtlpriv, REG_LDOA15_CTRL, 0x05); in _rtl92de_init_mac()
659 rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x2b); in _rtl92de_init_mac()
662 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL, 0x0F); in _rtl92de_init_mac()
669 bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1) | BIT(0); in _rtl92de_init_mac()
671 rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, bytetmp); in _rtl92de_init_mac()
675 bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1); in _rtl92de_init_mac()
680 bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1); in _rtl92de_init_mac()
686 rtl_write_word(rtlpriv, REG_APS_FSMCO, 0x1012); in _rtl92de_init_mac()
691 rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL + 1, 0x82); in _rtl92de_init_mac()
698 rtl_write_word(rtlpriv, REG_CR, 0x0); in _rtl92de_init_mac()
701 rtl_write_word(rtlpriv, REG_CR, 0x2ff); in _rtl92de_init_mac()
704 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 1, 0x0); in _rtl92de_init_mac()
716 rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff); in _rtl92de_init_mac()
717 rtl_write_byte(rtlpriv, REG_HISRE, 0xff); in _rtl92de_init_mac()
735 wordtmp = rtl_read_word(rtlpriv, REG_TRXDMA_CTRL); in _rtl92de_init_mac()
738 rtl_write_word(rtlpriv, REG_TRXDMA_CTRL, wordtmp); in _rtl92de_init_mac()
743 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 1, 0x1F); in _rtl92de_init_mac()
750 rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config); in _rtl92de_init_mac()
754 rtl_write_dword(rtlpriv, REG_TCR, rtlpci->transmit_config); in _rtl92de_init_mac()
757 rtl_write_byte(rtlpriv, 0x4d0, 0x0); in _rtl92de_init_mac()
760 rtl_write_dword(rtlpriv, REG_BCNQ_DESA, in _rtl92de_init_mac()
762 rtl_write_dword(rtlpriv, REG_MGQ_DESA, rtlpci->tx_ring[MGNT_QUEUE].dma); in _rtl92de_init_mac()
763 rtl_write_dword(rtlpriv, REG_VOQ_DESA, rtlpci->tx_ring[VO_QUEUE].dma); in _rtl92de_init_mac()
764 rtl_write_dword(rtlpriv, REG_VIQ_DESA, rtlpci->tx_ring[VI_QUEUE].dma); in _rtl92de_init_mac()
765 rtl_write_dword(rtlpriv, REG_BEQ_DESA, rtlpci->tx_ring[BE_QUEUE].dma); in _rtl92de_init_mac()
766 rtl_write_dword(rtlpriv, REG_BKQ_DESA, rtlpci->tx_ring[BK_QUEUE].dma); in _rtl92de_init_mac()
767 rtl_write_dword(rtlpriv, REG_HQ_DESA, rtlpci->tx_ring[HIGH_QUEUE].dma); in _rtl92de_init_mac()
769 rtl_write_dword(rtlpriv, REG_RX_DESA, in _rtl92de_init_mac()
775 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, 0x33); in _rtl92de_init_mac()
778 rtl_write_dword(rtlpriv, REG_INT_MIG, 0); in _rtl92de_init_mac()
781 bytetmp = rtl_read_byte(rtlpriv, REG_APSD_CTRL); in _rtl92de_init_mac()
782 rtl_write_byte(rtlpriv, REG_APSD_CTRL, bytetmp & ~BIT(6)); in _rtl92de_init_mac()
785 bytetmp = rtl_read_byte(rtlpriv, REG_APSD_CTRL); in _rtl92de_init_mac()
792 rtl_write_dword(rtlpriv, REG_MCUTST_1, 0x0); in _rtl92de_init_mac()
800 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92de_hw_configure() local
806 rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, 0x8); in _rtl92de_hw_configure()
807 rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode); in _rtl92de_hw_configure()
808 rtl_write_dword(rtlpriv, REG_RRSR, reg_rrsr); in _rtl92de_hw_configure()
809 rtl_write_byte(rtlpriv, REG_SLOT, 0x09); in _rtl92de_hw_configure()
810 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, 0x0); in _rtl92de_hw_configure()
811 rtl_write_word(rtlpriv, REG_FWHW_TXQ_CTRL, 0x1F80); in _rtl92de_hw_configure()
812 rtl_write_word(rtlpriv, REG_RL, 0x0707); in _rtl92de_hw_configure()
813 rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x02012802); in _rtl92de_hw_configure()
814 rtl_write_byte(rtlpriv, REG_HWSEQ_CTRL, 0xFF); in _rtl92de_hw_configure()
815 rtl_write_dword(rtlpriv, REG_DARFRC, 0x01000000); in _rtl92de_hw_configure()
816 rtl_write_dword(rtlpriv, REG_DARFRC + 4, 0x07060504); in _rtl92de_hw_configure()
817 rtl_write_dword(rtlpriv, REG_RARFRC, 0x01000000); in _rtl92de_hw_configure()
818 rtl_write_dword(rtlpriv, REG_RARFRC + 4, 0x07060504); in _rtl92de_hw_configure()
821 rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0xb9726641); in _rtl92de_hw_configure()
823 rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x66626641); in _rtl92de_hw_configure()
825 rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0xb972a841); in _rtl92de_hw_configure()
826 rtl_write_byte(rtlpriv, REG_ATIMWND, 0x2); in _rtl92de_hw_configure()
827 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0x0a); in _rtl92de_hw_configure()
829 rtl_write_byte(rtlpriv, REG_BCN_CTRL, rtlpci->reg_bcn_ctrl_val); in _rtl92de_hw_configure()
830 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92de_hw_configure()
831 rtl_write_byte(rtlpriv, REG_PIFS, 0x1C); in _rtl92de_hw_configure()
832 rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16); in _rtl92de_hw_configure()
833 rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); in _rtl92de_hw_configure()
835 rtl_write_word(rtlpriv, REG_FAST_EDCA_CTRL, 0x6666); in _rtl92de_hw_configure()
837 rtl_write_byte(rtlpriv, REG_ACKTO, 0x40); in _rtl92de_hw_configure()
839 rtl_write_word(rtlpriv, REG_SPEC_SIFS, 0x1010); in _rtl92de_hw_configure()
840 rtl_write_word(rtlpriv, REG_MAC_SPEC_SIFS, 0x1010); in _rtl92de_hw_configure()
842 rtl_write_word(rtlpriv, REG_SIFS_CTX, 0x1010); in _rtl92de_hw_configure()
844 rtl_write_word(rtlpriv, REG_SIFS_TRX, 0x1010); in _rtl92de_hw_configure()
846 rtl_write_dword(rtlpriv, REG_MAR, 0xffffffff); in _rtl92de_hw_configure()
847 rtl_write_dword(rtlpriv, REG_MAR + 4, 0xffffffff); in _rtl92de_hw_configure()
848 switch (rtlpriv->phy.rf_type) { in _rtl92de_hw_configure()
862 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92de_enable_aspm_back_door() local
865 rtl_write_byte(rtlpriv, 0x34b, 0x93); in _rtl92de_enable_aspm_back_door()
866 rtl_write_word(rtlpriv, 0x350, 0x870c); in _rtl92de_enable_aspm_back_door()
867 rtl_write_byte(rtlpriv, 0x352, 0x1); in _rtl92de_enable_aspm_back_door()
869 rtl_write_byte(rtlpriv, 0x349, 0x1b); in _rtl92de_enable_aspm_back_door()
871 rtl_write_byte(rtlpriv, 0x349, 0x03); in _rtl92de_enable_aspm_back_door()
872 rtl_write_word(rtlpriv, 0x350, 0x2718); in _rtl92de_enable_aspm_back_door()
873 rtl_write_byte(rtlpriv, 0x352, 0x1); in _rtl92de_enable_aspm_back_door()
878 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_enable_hw_security_config() local
881 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in rtl92de_enable_hw_security_config()
883 rtlpriv->sec.pairwise_enc_algorithm, in rtl92de_enable_hw_security_config()
884 rtlpriv->sec.group_enc_algorithm); in rtl92de_enable_hw_security_config()
885 if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) { in rtl92de_enable_hw_security_config()
886 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92de_enable_hw_security_config()
891 if (rtlpriv->sec.use_defaultkey) { in rtl92de_enable_hw_security_config()
896 rtl_write_byte(rtlpriv, REG_CR + 1, 0x02); in rtl92de_enable_hw_security_config()
897 RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, in rtl92de_enable_hw_security_config()
899 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value); in rtl92de_enable_hw_security_config()
904 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_hw_init() local
907 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92de_hw_init()
924 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n"); in rtl92de_hw_init()
932 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, in rtl92de_hw_init()
937 rtlpriv->psc.fw_current_inpsmode = false; in rtl92de_hw_init()
939 tmp_u1b = rtl_read_byte(rtlpriv, 0x605); in rtl92de_hw_init()
941 rtl_write_byte(rtlpriv, 0x605, tmp_u1b); in rtl92de_hw_init()
944 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in rtl92de_hw_init()
947 tmp_u1b = rtl_read_byte(rtlpriv, 0x4d0); in rtl92de_hw_init()
949 rtl_write_byte(rtlpriv, 0x4d0, tmp_u1b); in rtl92de_hw_init()
951 rtl_write_byte(rtlpriv, 0x4d3, 0x80); in rtl92de_hw_init()
953 tmp_u1b = rtl_read_byte(rtlpriv, 0x605); in rtl92de_hw_init()
955 rtl_write_byte(rtlpriv, 0x605, tmp_u1b); in rtl92de_hw_init()
959 rtl_write_byte(rtlpriv, REG_RD_CTRL, 0xff); in rtl92de_hw_init()
960 rtl_write_word(rtlpriv, REG_RD_NAV_NXT, 0x200); in rtl92de_hw_init()
961 rtl_write_byte(rtlpriv, REG_RD_RESP_PKT_TH, 0x05); in rtl92de_hw_init()
969 rtlpci->receive_config = rtl_read_dword(rtlpriv, REG_RCR); in rtl92de_hw_init()
1020 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR, mac->mac_addr); in rtl92de_hw_init()
1056 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92de_read_chip_version() local
1060 value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG); in _rtl92de_read_chip_version()
1063 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "TEST CHIP!!!\n"); in _rtl92de_read_chip_version()
1066 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Normal CHIP!!!\n"); in _rtl92de_read_chip_version()
1074 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92de_set_media_status() local
1075 u8 bt_msr = rtl_read_byte(rtlpriv, MSR); in _rtl92de_set_media_status()
1090 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, in _rtl92de_set_media_status()
1094 bcnfunc_enable = rtl_read_byte(rtlpriv, REG_BCN_CTRL); in _rtl92de_set_media_status()
1100 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92de_set_media_status()
1106 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92de_set_media_status()
1113 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92de_set_media_status()
1119 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92de_set_media_status()
1123 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in _rtl92de_set_media_status()
1129 rtl_write_byte(rtlpriv, MSR, bt_msr); in _rtl92de_set_media_status()
1130 rtlpriv->cfg->ops->led_control(hw, ledaction); in _rtl92de_set_media_status()
1132 rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x00); in _rtl92de_set_media_status()
1134 rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x66); in _rtl92de_set_media_status()
1140 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_set_check_bssid() local
1143 if (rtlpriv->psc.rfpwr_state != ERFON) in rtl92de_set_check_bssid()
1146 rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RCR, (u8 *)(®_rcr)); in rtl92de_set_check_bssid()
1150 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(®_rcr)); in rtl92de_set_check_bssid()
1155 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(®_rcr)); in rtl92de_set_check_bssid()
1161 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_set_network_type() local
1167 if (rtlpriv->mac80211.link_state == MAC80211_LINKED) { in rtl92de_set_network_type()
1182 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_linked_set_reg() local
1183 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92d_linked_set_reg()
1189 RT_TRACE(rtlpriv, COMP_SCAN | COMP_INIT, DBG_DMESG, in rtl92d_linked_set_reg()
1204 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_enable_interrupt() local
1207 rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF); in rtl92de_enable_interrupt()
1208 rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF); in rtl92de_enable_interrupt()
1213 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_disable_interrupt() local
1216 rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED); in rtl92de_disable_interrupt()
1217 rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED); in rtl92de_disable_interrupt()
1223 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92de_poweroff_adapter() local
1227 rtlpriv->intf_ops->enable_aspm(hw); in _rtl92de_poweroff_adapter()
1228 rtl_write_byte(rtlpriv, REG_RF_CTRL, 0x00); in _rtl92de_poweroff_adapter()
1233 rtl_write_byte(rtlpriv, REG_LDOA15_CTRL, 0x04); in _rtl92de_poweroff_adapter()
1239 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, 0x51); in _rtl92de_poweroff_adapter()
1242 rtl_write_byte(rtlpriv, REG_MCUFWDL, 0x00); in _rtl92de_poweroff_adapter()
1247 rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00000000); in _rtl92de_poweroff_adapter()
1250 u1b_tmp = rtl_read_byte(rtlpriv, REG_GPIO_PIN_CTRL); in _rtl92de_poweroff_adapter()
1254 rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, in _rtl92de_poweroff_adapter()
1258 rtl_write_word(rtlpriv, REG_GPIO_IO_SEL, 0x0790); in _rtl92de_poweroff_adapter()
1261 rtl_write_word(rtlpriv, REG_LEDCFG0, 0x8080); in _rtl92de_poweroff_adapter()
1266 rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x80); in _rtl92de_poweroff_adapter()
1269 rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x23); in _rtl92de_poweroff_adapter()
1272 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL, 0x0e); in _rtl92de_poweroff_adapter()
1275 rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0e); in _rtl92de_poweroff_adapter()
1285 rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, 0x10); in _rtl92de_poweroff_adapter()
1287 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92de_poweroff_adapter()
1289 REG_SPS0_CTRL, rtl_read_byte(rtlpriv, REG_SPS0_CTRL)); in _rtl92de_poweroff_adapter()
1294 if (rtlpriv->rtlhal.macphymode != SINGLEMAC_SINGLEPHY) { in _rtl92de_poweroff_adapter()
1296 u1b_tmp = rtl_read_byte(rtlpriv, REG_POWER_OFF_IN_PROCESS); in _rtl92de_poweroff_adapter()
1298 rtl_write_byte(rtlpriv, REG_POWER_OFF_IN_PROCESS, u1b_tmp); in _rtl92de_poweroff_adapter()
1302 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "<=======\n"); in _rtl92de_poweroff_adapter()
1307 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_card_disable() local
1319 rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF); in rtl92de_card_disable()
1329 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 1, 0xFE); in rtl92de_card_disable()
1340 rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40); in rtl92de_card_disable()
1347 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2); in rtl92de_card_disable()
1351 if (rtlpriv->rtlhal.interfaceindex == 1) in rtl92de_card_disable()
1352 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE0); in rtl92de_card_disable()
1357 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 1, 0xff); in rtl92de_card_disable()
1359 rtl_write_byte(rtlpriv, REG_CR, 0x0); in rtl92de_card_disable()
1360 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "==> Do power off.......\n"); in rtl92de_card_disable()
1369 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_interrupt_recognized() local
1372 *p_inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0]; in rtl92de_interrupt_recognized()
1373 rtl_write_dword(rtlpriv, ISR, *p_inta); in rtl92de_interrupt_recognized()
1383 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_set_beacon_related_registers() local
1390 rtl_write_word(rtlpriv, REG_ATIMWND, atim_window); in rtl92de_set_beacon_related_registers()
1391 rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval); in rtl92de_set_beacon_related_registers()
1392 rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660f); in rtl92de_set_beacon_related_registers()
1393 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_CCK, 0x20); in rtl92de_set_beacon_related_registers()
1394 if (rtlpriv->rtlhal.current_bandtype == BAND_ON_5G) in rtl92de_set_beacon_related_registers()
1395 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_OFDM, 0x30); in rtl92de_set_beacon_related_registers()
1397 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_OFDM, 0x20); in rtl92de_set_beacon_related_registers()
1398 rtl_write_byte(rtlpriv, 0x606, 0x30); in rtl92de_set_beacon_related_registers()
1403 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_set_beacon_interval() local
1407 RT_TRACE(rtlpriv, COMP_BEACON, DBG_DMESG, in rtl92de_set_beacon_interval()
1410 rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval); in rtl92de_set_beacon_interval()
1417 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_update_interrupt_mask() local
1420 RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD, "add_msr:%x, rm_msr:%x\n", in rtl92de_update_interrupt_mask()
1575 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92de_read_txpower_info() local
1591 if (IS_92D_D_CUT(rtlpriv->rtlhal.version) || in _rtl92de_read_txpower_info()
1592 IS_92D_E_CUT(rtlpriv->rtlhal.version)) { in _rtl92de_read_txpower_info()
1597 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, in _rtl92de_read_txpower_info()
1649 RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD, in _rtl92de_read_txpower_info()
1651 RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD, in _rtl92de_read_txpower_info()
1653 RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD, in _rtl92de_read_txpower_info()
1655 RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD, in _rtl92de_read_txpower_info()
1686 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92de_read_macphymode_from_prom() local
1692 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92de_read_macphymode_from_prom()
1696 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92de_read_macphymode_from_prom()
1711 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92de_efuse_update_chip_version() local
1712 enum version_8192d chipver = rtlpriv->rtlhal.version; in _rtl92de_efuse_update_chip_version()
1716 rtlpriv->intf_ops->read_efuse_byte(hw, EEPROME_CHIP_VERSION_H, in _rtl92de_efuse_update_chip_version()
1718 rtlpriv->intf_ops->read_efuse_byte(hw, EEPROME_CHIP_VERSION_L, in _rtl92de_efuse_update_chip_version()
1724 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "C-CUT!!!\n"); in _rtl92de_efuse_update_chip_version()
1728 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "D-CUT!!!\n"); in _rtl92de_efuse_update_chip_version()
1732 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "E-CUT!!!\n"); in _rtl92de_efuse_update_chip_version()
1736 RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Unknown CUT!\n"); in _rtl92de_efuse_update_chip_version()
1739 rtlpriv->rtlhal.version = chipver; in _rtl92de_efuse_update_chip_version()
1744 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92de_read_adapter_info() local
1761 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in _rtl92de_read_adapter_info()
1764 RT_PRINT_DATA(rtlpriv, COMP_INIT, DBG_DMESG, "MAP", in _rtl92de_read_adapter_info()
1769 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, in _rtl92de_read_adapter_info()
1773 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n"); in _rtl92de_read_adapter_info()
1777 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in _rtl92de_read_adapter_info()
1789 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "EEPROMId = 0x%4x\n", eeprom_id); in _rtl92de_read_adapter_info()
1790 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92de_read_adapter_info()
1792 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92de_read_adapter_info()
1794 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92de_read_adapter_info()
1796 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92de_read_adapter_info()
1811 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR, in _rtl92de_read_adapter_info()
1813 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "%pM\n", rtlefuse->dev_addr); in _rtl92de_read_adapter_info()
1833 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92de_read_adapter_info()
1839 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_read_eeprom_info() local
1845 tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR); in rtl92de_read_eeprom_info()
1848 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EEPROM\n"); in rtl92de_read_eeprom_info()
1851 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EFUSE\n"); in rtl92de_read_eeprom_info()
1855 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n"); in rtl92de_read_eeprom_info()
1860 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n"); in rtl92de_read_eeprom_info()
1868 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_update_hal_rate_table() local
1869 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92de_update_hal_rate_table()
1942 rtl_write_dword(rtlpriv, REG_ARFR0 + ratr_index * 4, ratr_value); in rtl92de_update_hal_rate_table()
1943 RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n", in rtl92de_update_hal_rate_table()
1944 rtl_read_dword(rtlpriv, REG_ARFR0)); in rtl92de_update_hal_rate_table()
1950 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_update_hal_rate_mask() local
1951 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92de_update_hal_rate_mask()
2075 RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, in rtl92de_update_hal_rate_mask()
2086 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_update_hal_rate_tbl() local
2088 if (rtlpriv->dm.useramask) in rtl92de_update_hal_rate_tbl()
2096 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_update_channel_access_setting() local
2100 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME, in rtl92de_update_channel_access_setting()
2106 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SIFS, (u8 *)&sifs_timer); in rtl92de_update_channel_access_setting()
2111 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_gpio_radio_on_off_checking() local
2123 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); in rtl92de_gpio_radio_on_off_checking()
2125 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); in rtl92de_gpio_radio_on_off_checking()
2129 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); in rtl92de_gpio_radio_on_off_checking()
2131 rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG, rtl_read_byte(rtlpriv, in rtl92de_gpio_radio_on_off_checking()
2133 u1tmp = rtl_read_byte(rtlpriv, REG_GPIO_IO_SEL); in rtl92de_gpio_radio_on_off_checking()
2136 RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, in rtl92de_gpio_radio_on_off_checking()
2142 RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, in rtl92de_gpio_radio_on_off_checking()
2149 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); in rtl92de_gpio_radio_on_off_checking()
2151 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); in rtl92de_gpio_radio_on_off_checking()
2155 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); in rtl92de_gpio_radio_on_off_checking()
2157 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); in rtl92de_gpio_radio_on_off_checking()
2167 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_set_key() local
2187 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n"); in rtl92de_set_key()
2193 memset(rtlpriv->sec.key_buf[idx], 0, in rtl92de_set_key()
2195 rtlpriv->sec.key_len[idx] = 0; in rtl92de_set_key()
2213 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in rtl92de_set_key()
2218 if (is_wepkey || rtlpriv->sec.use_defaultkey) { in rtl92de_set_key()
2230 RT_TRACE(rtlpriv, COMP_SEC, in rtl92de_set_key()
2242 if (rtlpriv->sec.key_len[key_index] == 0) { in rtl92de_set_key()
2243 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92de_set_key()
2250 RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, in rtl92de_set_key()
2252 rtlpriv->sec.key_len[PAIRWISE_KEYIDX]); in rtl92de_set_key()
2253 RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, in rtl92de_set_key()
2255 rtlpriv->sec.key_buf[0][0], in rtl92de_set_key()
2256 rtlpriv->sec.key_buf[0][1]); in rtl92de_set_key()
2257 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92de_set_key()
2260 RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD, in rtl92de_set_key()
2262 rtlpriv->sec.pairwise_key, in rtl92de_set_key()
2263 rtlpriv-> in rtl92de_set_key()
2265 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92de_set_key()
2270 rtlpriv-> in rtl92de_set_key()
2273 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92de_set_key()
2281 rtlpriv->sec.key_buf[entry_id]); in rtl92de_set_key()
2286 rtlpriv->sec.key_buf in rtl92de_set_key()
2295 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_suspend() local
2297 rtlpriv->rtlhal.macphyctl_reg = rtl_read_byte(rtlpriv, in rtl92de_suspend()
2303 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92de_resume() local
2305 rtl_write_byte(rtlpriv, REG_MAC_PHY_CTRL_NORMAL, in rtl92de_resume()
2306 rtlpriv->rtlhal.macphyctl_reg); in rtl92de_resume()