Lines Matching refs:dev
41 int b43_phy_allocate(struct b43_wldev *dev) in b43_phy_allocate() argument
43 struct b43_phy *phy = &(dev->phy); in b43_phy_allocate()
83 err = phy->ops->allocate(dev); in b43_phy_allocate()
90 void b43_phy_free(struct b43_wldev *dev) in b43_phy_free() argument
92 dev->phy.ops->free(dev); in b43_phy_free()
93 dev->phy.ops = NULL; in b43_phy_free()
96 int b43_phy_init(struct b43_wldev *dev) in b43_phy_init() argument
98 struct b43_phy *phy = &dev->phy; in b43_phy_init()
106 phy->chandef = &dev->wl->hw->conf.chandef; in b43_phy_init()
110 phy->ops->switch_analog(dev, true); in b43_phy_init()
111 b43_software_rfkill(dev, false); in b43_phy_init()
113 err = ops->init(dev); in b43_phy_init()
115 b43err(dev->wl, "PHY init failed\n"); in b43_phy_init()
120 err = b43_switch_channel(dev, phy->channel); in b43_phy_init()
122 b43err(dev->wl, "PHY init: Channel switch to default failed\n"); in b43_phy_init()
131 ops->exit(dev); in b43_phy_init()
133 b43_software_rfkill(dev, true); in b43_phy_init()
138 void b43_phy_exit(struct b43_wldev *dev) in b43_phy_exit() argument
140 const struct b43_phy_operations *ops = dev->phy.ops; in b43_phy_exit()
142 b43_software_rfkill(dev, true); in b43_phy_exit()
143 dev->phy.do_full_init = true; in b43_phy_exit()
145 ops->exit(dev); in b43_phy_exit()
148 bool b43_has_hardware_pctl(struct b43_wldev *dev) in b43_has_hardware_pctl() argument
150 if (!dev->phy.hardware_power_control) in b43_has_hardware_pctl()
152 if (!dev->phy.ops->supports_hwpctl) in b43_has_hardware_pctl()
154 return dev->phy.ops->supports_hwpctl(dev); in b43_has_hardware_pctl()
157 void b43_radio_lock(struct b43_wldev *dev) in b43_radio_lock() argument
162 B43_WARN_ON(dev->phy.radio_locked); in b43_radio_lock()
163 dev->phy.radio_locked = true; in b43_radio_lock()
166 macctl = b43_read32(dev, B43_MMIO_MACCTL); in b43_radio_lock()
168 b43_write32(dev, B43_MMIO_MACCTL, macctl); in b43_radio_lock()
171 b43_read32(dev, B43_MMIO_MACCTL); in b43_radio_lock()
175 void b43_radio_unlock(struct b43_wldev *dev) in b43_radio_unlock() argument
180 B43_WARN_ON(!dev->phy.radio_locked); in b43_radio_unlock()
181 dev->phy.radio_locked = false; in b43_radio_unlock()
185 b43_read16(dev, B43_MMIO_PHY_VER); in b43_radio_unlock()
187 macctl = b43_read32(dev, B43_MMIO_MACCTL); in b43_radio_unlock()
189 b43_write32(dev, B43_MMIO_MACCTL, macctl); in b43_radio_unlock()
192 void b43_phy_lock(struct b43_wldev *dev) in b43_phy_lock() argument
195 B43_WARN_ON(dev->phy.phy_locked); in b43_phy_lock()
196 dev->phy.phy_locked = true; in b43_phy_lock()
198 B43_WARN_ON(dev->dev->core_rev < 3); in b43_phy_lock()
200 if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP)) in b43_phy_lock()
201 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE); in b43_phy_lock()
204 void b43_phy_unlock(struct b43_wldev *dev) in b43_phy_unlock() argument
207 B43_WARN_ON(!dev->phy.phy_locked); in b43_phy_unlock()
208 dev->phy.phy_locked = false; in b43_phy_unlock()
210 B43_WARN_ON(dev->dev->core_rev < 3); in b43_phy_unlock()
212 if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP)) in b43_phy_unlock()
213 b43_power_saving_ctl_bits(dev, 0); in b43_phy_unlock()
216 static inline void assert_mac_suspended(struct b43_wldev *dev) in assert_mac_suspended() argument
220 if ((b43_status(dev) >= B43_STAT_INITIALIZED) && in assert_mac_suspended()
221 (dev->mac_suspended <= 0)) { in assert_mac_suspended()
222 b43dbg(dev->wl, "PHY/RADIO register access with " in assert_mac_suspended()
228 u16 b43_radio_read(struct b43_wldev *dev, u16 reg) in b43_radio_read() argument
230 assert_mac_suspended(dev); in b43_radio_read()
231 dev->phy.writes_counter = 0; in b43_radio_read()
232 return dev->phy.ops->radio_read(dev, reg); in b43_radio_read()
235 void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value) in b43_radio_write() argument
237 assert_mac_suspended(dev); in b43_radio_write()
238 if (b43_bus_host_is_pci(dev->dev) && in b43_radio_write()
239 ++dev->phy.writes_counter > B43_MAX_WRITES_IN_ROW) { in b43_radio_write()
240 b43_read32(dev, B43_MMIO_MACCTL); in b43_radio_write()
241 dev->phy.writes_counter = 1; in b43_radio_write()
243 dev->phy.ops->radio_write(dev, reg, value); in b43_radio_write()
246 void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask) in b43_radio_mask() argument
248 b43_radio_write16(dev, offset, in b43_radio_mask()
249 b43_radio_read16(dev, offset) & mask); in b43_radio_mask()
252 void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set) in b43_radio_set() argument
254 b43_radio_write16(dev, offset, in b43_radio_set()
255 b43_radio_read16(dev, offset) | set); in b43_radio_set()
258 void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set) in b43_radio_maskset() argument
260 b43_radio_write16(dev, offset, in b43_radio_maskset()
261 (b43_radio_read16(dev, offset) & mask) | set); in b43_radio_maskset()
264 bool b43_radio_wait_value(struct b43_wldev *dev, u16 offset, u16 mask, in b43_radio_wait_value() argument
271 val = b43_radio_read(dev, offset); in b43_radio_wait_value()
279 u16 b43_phy_read(struct b43_wldev *dev, u16 reg) in b43_phy_read() argument
281 assert_mac_suspended(dev); in b43_phy_read()
282 dev->phy.writes_counter = 0; in b43_phy_read()
284 if (dev->phy.ops->phy_read) in b43_phy_read()
285 return dev->phy.ops->phy_read(dev, reg); in b43_phy_read()
287 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); in b43_phy_read()
288 return b43_read16(dev, B43_MMIO_PHY_DATA); in b43_phy_read()
291 void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value) in b43_phy_write() argument
293 assert_mac_suspended(dev); in b43_phy_write()
294 if (b43_bus_host_is_pci(dev->dev) && in b43_phy_write()
295 ++dev->phy.writes_counter > B43_MAX_WRITES_IN_ROW) { in b43_phy_write()
296 b43_read16(dev, B43_MMIO_PHY_VER); in b43_phy_write()
297 dev->phy.writes_counter = 1; in b43_phy_write()
300 if (dev->phy.ops->phy_write) in b43_phy_write()
301 return dev->phy.ops->phy_write(dev, reg, value); in b43_phy_write()
303 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); in b43_phy_write()
304 b43_write16(dev, B43_MMIO_PHY_DATA, value); in b43_phy_write()
307 void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg) in b43_phy_copy() argument
309 b43_phy_write(dev, destreg, b43_phy_read(dev, srcreg)); in b43_phy_copy()
312 void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask) in b43_phy_mask() argument
314 if (dev->phy.ops->phy_maskset) { in b43_phy_mask()
315 assert_mac_suspended(dev); in b43_phy_mask()
316 dev->phy.ops->phy_maskset(dev, offset, mask, 0); in b43_phy_mask()
318 b43_phy_write(dev, offset, in b43_phy_mask()
319 b43_phy_read(dev, offset) & mask); in b43_phy_mask()
323 void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set) in b43_phy_set() argument
325 if (dev->phy.ops->phy_maskset) { in b43_phy_set()
326 assert_mac_suspended(dev); in b43_phy_set()
327 dev->phy.ops->phy_maskset(dev, offset, 0xFFFF, set); in b43_phy_set()
329 b43_phy_write(dev, offset, in b43_phy_set()
330 b43_phy_read(dev, offset) | set); in b43_phy_set()
334 void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set) in b43_phy_maskset() argument
336 if (dev->phy.ops->phy_maskset) { in b43_phy_maskset()
337 assert_mac_suspended(dev); in b43_phy_maskset()
338 dev->phy.ops->phy_maskset(dev, offset, mask, set); in b43_phy_maskset()
340 b43_phy_write(dev, offset, in b43_phy_maskset()
341 (b43_phy_read(dev, offset) & mask) | set); in b43_phy_maskset()
345 void b43_phy_put_into_reset(struct b43_wldev *dev) in b43_phy_put_into_reset() argument
349 switch (dev->dev->bus_type) { in b43_phy_put_into_reset()
352 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_phy_put_into_reset()
356 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); in b43_phy_put_into_reset()
359 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_phy_put_into_reset()
361 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); in b43_phy_put_into_reset()
367 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); in b43_phy_put_into_reset()
371 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); in b43_phy_put_into_reset()
374 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); in b43_phy_put_into_reset()
376 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); in b43_phy_put_into_reset()
384 void b43_phy_take_out_of_reset(struct b43_wldev *dev) in b43_phy_take_out_of_reset() argument
388 switch (dev->dev->bus_type) { in b43_phy_take_out_of_reset()
392 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_phy_take_out_of_reset()
396 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); in b43_phy_take_out_of_reset()
400 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_phy_take_out_of_reset()
403 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); in b43_phy_take_out_of_reset()
410 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); in b43_phy_take_out_of_reset()
414 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); in b43_phy_take_out_of_reset()
415 ssb_read32(dev->dev->sdev, SSB_TMSLOW); /* flush */ in b43_phy_take_out_of_reset()
418 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); in b43_phy_take_out_of_reset()
421 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); in b43_phy_take_out_of_reset()
422 ssb_read32(dev->dev->sdev, SSB_TMSLOW); /* flush */ in b43_phy_take_out_of_reset()
429 int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel) in b43_switch_channel() argument
431 struct b43_phy *phy = &(dev->phy); in b43_switch_channel()
439 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) in b43_switch_channel()
444 savedcookie = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_CHAN); in b43_switch_channel()
445 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_CHAN, channelcookie); in b43_switch_channel()
448 err = phy->ops->switch_channel(dev, new_channel); in b43_switch_channel()
458 b43_shm_write16(dev, B43_SHM_SHARED, in b43_switch_channel()
464 void b43_software_rfkill(struct b43_wldev *dev, bool blocked) in b43_software_rfkill() argument
466 struct b43_phy *phy = &dev->phy; in b43_software_rfkill()
468 b43_mac_suspend(dev); in b43_software_rfkill()
469 phy->ops->software_rfkill(dev, blocked); in b43_software_rfkill()
471 b43_mac_enable(dev); in b43_software_rfkill()
483 struct b43_wldev *dev; in b43_phy_txpower_adjust_work() local
486 dev = wl->current_dev; in b43_phy_txpower_adjust_work()
488 if (likely(dev && (b43_status(dev) >= B43_STAT_STARTED))) in b43_phy_txpower_adjust_work()
489 dev->phy.ops->adjust_txpower(dev); in b43_phy_txpower_adjust_work()
494 void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags) in b43_phy_txpower_check() argument
496 struct b43_phy *phy = &dev->phy; in b43_phy_txpower_check()
508 if ((dev->dev->board_vendor == SSB_BOARDVENDOR_BCM) && in b43_phy_txpower_check()
509 (dev->dev->board_type == SSB_BOARD_BU4306)) in b43_phy_txpower_check()
512 result = phy->ops->recalc_txpower(dev, !!(flags & B43_TXPWR_IGNORE_TSSI)); in b43_phy_txpower_check()
520 ieee80211_queue_work(dev->wl->hw, &dev->wl->txpower_adjust_work); in b43_phy_txpower_check()
523 int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset) in b43_phy_shm_tssi_read() argument
530 tmp = b43_shm_read32(dev, B43_SHM_SHARED, shm_offset); in b43_phy_shm_tssi_read()
543 b43_shm_write32(dev, B43_SHM_SHARED, shm_offset, tmp); in b43_phy_shm_tssi_read()
556 if (b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF1) in b43_phy_shm_tssi_read()
564 void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on) in b43_phyop_switch_analog_generic() argument
566 b43_write16(dev, B43_MMIO_PHY0, on ? 0 : 0xF4); in b43_phyop_switch_analog_generic()
570 bool b43_is_40mhz(struct b43_wldev *dev) in b43_is_40mhz() argument
572 return dev->phy.chandef->width == NL80211_CHAN_WIDTH_40; in b43_is_40mhz()
576 void b43_phy_force_clock(struct b43_wldev *dev, bool force) in b43_phy_force_clock() argument
580 WARN_ON(dev->phy.type != B43_PHYTYPE_N && in b43_phy_force_clock()
581 dev->phy.type != B43_PHYTYPE_HT && in b43_phy_force_clock()
582 dev->phy.type != B43_PHYTYPE_AC); in b43_phy_force_clock()
584 switch (dev->dev->bus_type) { in b43_phy_force_clock()
587 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_phy_force_clock()
592 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); in b43_phy_force_clock()
597 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); in b43_phy_force_clock()
602 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); in b43_phy_force_clock()