1888 	    (!!test_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &bp->sp_state))) {  in bnx2x_sp_event()
1899 		set_bit(BNX2X_AFEX_PENDING_VIFSET_MCP_ACK, &bp->sp_state);  in bnx2x_sp_event()
1901 		clear_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &bp->sp_state);  in bnx2x_sp_event()
5330 	clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state);  in bnx2x_handle_rx_mode_eqe()
5333 	if (test_and_clear_bit(BNX2X_FILTER_RX_MODE_SCHED, &bp->sp_state))  in bnx2x_handle_rx_mode_eqe()
5336 				    &bp->sp_state))  in bnx2x_handle_rx_mode_eqe()
5339 				    &bp->sp_state))  in bnx2x_handle_rx_mode_eqe()
5411 		set_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &bp->sp_state);  in bnx2x_after_function_update()
5717 			       &bp->sp_state)) {  in bnx2x_sp_task()
6156 	ramrod_param.pstate = &bp->sp_state;  in bnx2x_set_q_rx_mode()
6162 	set_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state);  in bnx2x_set_q_rx_mode()
9331 	if (test_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state))  in bnx2x_chip_cleanup()
9332 		set_bit(BNX2X_FILTER_RX_MODE_SCHED, &bp->sp_state);  in bnx2x_chip_cleanup()
12684 	if (test_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state)) {  in bnx2x_set_rx_mode_inner()
12685 		set_bit(BNX2X_FILTER_RX_MODE_SCHED, &bp->sp_state);  in bnx2x_set_rx_mode_inner()
14217 		bp->sp_state = 0;  in bnx2x_io_slot_reset()
14604 		clear_bit(BNX2X_FILTER_ISCSI_ETH_STOP_SCHED, &bp->sp_state);  in bnx2x_set_iscsi_eth_rx_mode()
14609 		clear_bit(BNX2X_FILTER_ISCSI_ETH_START_SCHED, &bp->sp_state);  in bnx2x_set_iscsi_eth_rx_mode()
14611 	if (test_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state))  in bnx2x_set_iscsi_eth_rx_mode()
14612 		set_bit(sched_state, &bp->sp_state);  in bnx2x_set_iscsi_eth_rx_mode()
14653 				   &bp->sp_state, BNX2X_OBJ_TYPE_RX,  in bnx2x_drv_ctl()