491 	opcode |= ((BP_VN(bp) << DMAE_CMD_E1HVN_SHIFT) |  in bnx2x_dmae_opcode()
492 		   (BP_VN(bp) << DMAE_COMMAND_DST_VN_SHIFT));  in bnx2x_dmae_opcode()
1600 			val = (0xee0f | (1 << (BP_VN(bp) + 4)));  in bnx2x_hc_int_enable()
1664 		val = (0xee0f | (1 << (BP_VN(bp) + 4)));  in bnx2x_igu_int_enable()
2550 	if (bp->mf_config[BP_VN(bp)] & FUNC_MF_CFG_FUNC_DISABLED) {  in bnx2x_read_mf_cfg()
2845 		bp->mf_config[BP_VN(bp)] = mf_config;  in bnx2x_handle_afex_cmd()
2859 			bp->mf_config[BP_VN(bp)] = mf_config;  in bnx2x_handle_afex_cmd()
2861 			bnx2x_calc_vn_max(bp, BP_VN(bp), &cmng_input);  in bnx2x_handle_afex_cmd()
2863 				cmng_input.vnic_max_rate[BP_VN(bp)];  in bnx2x_handle_afex_cmd()
2985 	val = (0xff0f | (1 << (BP_VN(bp) + 4)));  in bnx2x_pmf_update()
3296 				BP_FUNC(bp) : BP_VN(bp))*4, 0);  in bnx2x_pf_init()
3302 				BP_FUNC(bp) : BP_VN(bp))*4, 0);  in bnx2x_pf_init()
3759 		if (bp->mf_config[BP_VN(bp)] & FUNC_MF_CFG_FUNC_DISABLED) {  in bnx2x_oem_event()
4263 			bp->mf_config[BP_VN(bp)] = MF_CFG_RD(bp,  in bnx2x_attn_int_deasserted3()
5961 		sb_data_e2.common.p_func.vnic_id = BP_VN(bp);  in bnx2x_init_sb()
5976 		sb_data_e1x.common.p_func.vnic_id = BP_VN(bp);  in bnx2x_init_sb()
6088 	sp_sb_data.p_func.vnic_id	= BP_VN(bp);  in bnx2x_init_def_sb()
8153 				dsb_idx = BP_VN(bp);  in bnx2x_init_hw_func()
8995 	if (!CHIP_IS_E1x(bp) && BP_VN(bp) == 3) {  in bnx2x_reset_func()
9117 		u8 entry = (BP_VN(bp) + 1)*8;  in bnx2x_send_unload_req()
11077 		int vn = BP_VN(bp);  in bnx2x_get_igu_cam_info()
11855 		bp->mf_config[BP_VN(bp)] =  in validate_set_si_mode()
11953 	vn = BP_VN(bp);  in bnx2x_get_hwinfo()