135 	XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg);  in xgbe_an_enable_kr_training()
145 	XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg);  in xgbe_an_disable_kr_training()
155 	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);  in xgbe_pcs_power_cycle()
160 	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);  in xgbe_pcs_power_cycle()
211 	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL2, reg);  in xgbe_xgmii_mode()
216 	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);  in xgbe_xgmii_mode()
259 	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL2, reg);  in xgbe_gmii_2500_mode()
264 	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);  in xgbe_gmii_2500_mode()
307 	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL2, reg);  in xgbe_gmii_mode()
312 	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);  in xgbe_gmii_mode()
437 	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_CTRL1, reg);  in xgbe_set_an()
474 	XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FECCTRL, reg);  in xgbe_an_tx_training()
482 		XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL,  in xgbe_an_tx_training()
504 	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_XNP + 2, 0);  in xgbe_an_tx_xnp()
505 	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_XNP + 1, 0);  in xgbe_an_tx_xnp()
506 	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_XNP, msg);  in xgbe_an_tx_xnp()
702 	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, int_reg);  in xgbe_an_state_machine()
744 		XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, 0);  in xgbe_an_state_machine()
751 		XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, 0);  in xgbe_an_state_machine()
788 	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2, reg);  in xgbe_an_init()
803 	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1, reg);  in xgbe_an_init()
820 	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg);  in xgbe_an_init()
962 	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, 0);  in __xgbe_phy_config_aneg()
1170 	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INTMASK, 0);  in xgbe_phy_stop()
1213 	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INTMASK, 0x07);  in xgbe_phy_start()
1229 	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);  in xgbe_phy_reset()
1244 	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, 0);  in xgbe_phy_reset()