Lines Matching refs:tegra_dc_readl
100 value = tegra_dc_readl(dc, offset); in tegra_dc_readl_active()
618 value = tegra_dc_readl(dc, DC_WIN_WIN_OPTIONS); in tegra_plane_atomic_disable()
752 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); in tegra_cursor_atomic_update()
756 value = tegra_dc_readl(dc, DC_DISP_BLEND_CURSOR_CONTROL); in tegra_cursor_atomic_update()
782 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); in tegra_cursor_atomic_disable()
933 value = tegra_dc_readl(dc, DC_CMD_INT_MASK); in tegra_dc_enable_vblank()
946 value = tegra_dc_readl(dc, DC_CMD_INT_MASK); in tegra_dc_disable_vblank()
974 base = tegra_dc_readl(dc, DC_WINBUF_START_ADDR); in tegra_dc_finish_page_flip()
1162 value = tegra_dc_readl(dc, DC_CMD_DISPLAY_COMMAND); in tegra_dc_stop()
1225 value = tegra_dc_readl(dc, DC_CMD_DISPLAY_POWER_CONTROL); in tegra_crtc_disable()
1249 value = tegra_dc_readl(dc, DC_DISP_INTERLACE_CONTROL); in tegra_crtc_enable()
1254 value = tegra_dc_readl(dc, DC_CMD_DISPLAY_COMMAND); in tegra_crtc_enable()
1259 value = tegra_dc_readl(dc, DC_CMD_DISPLAY_POWER_CONTROL); in tegra_crtc_enable()
1313 status = tegra_dc_readl(dc, DC_CMD_INT_STATUS); in tegra_dc_irq()
1364 tegra_dc_readl(dc, name)) in tegra_dc_show_regs()
1607 value = tegra_dc_readl(dc, DC_COM_CRC_CHECKSUM); in tegra_dc_show_crc()