156 	rdev->mc.vram_is_ddr = true;  in rs690_mc_init()
157 	rdev->mc.vram_width = 128;  in rs690_mc_init()
158 	rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);  in rs690_mc_init()
159 	rdev->mc.mc_vram_size = rdev->mc.real_vram_size;  in rs690_mc_init()
160 	rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);  in rs690_mc_init()
161 	rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);  in rs690_mc_init()
162 	rdev->mc.visible_vram_size = rdev->mc.aper_size;  in rs690_mc_init()
165 	rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);  in rs690_mc_init()
170 	if (rdev->mc.igp_sideport_enabled &&  in rs690_mc_init()
171 	    (rdev->mc.real_vram_size == (384 * 1024 * 1024))) {  in rs690_mc_init()
173 		rdev->mc.real_vram_size -= 128 * 1024 * 1024;  in rs690_mc_init()
174 		rdev->mc.mc_vram_size = rdev->mc.real_vram_size;  in rs690_mc_init()
183 	if (k8_addr + rdev->mc.visible_vram_size < 0x100000000ULL)	  in rs690_mc_init()
189 		if (rdev->mc.igp_sideport_enabled == false && radeon_fastfb == 1) {  in rs690_mc_init()
191 					(unsigned long long)rdev->mc.aper_base, k8_addr);  in rs690_mc_init()
192 			rdev->mc.aper_base = (resource_size_t)k8_addr;  in rs690_mc_init()
198 	radeon_vram_location(rdev, &rdev->mc, base);  in rs690_mc_init()
199 	rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1;  in rs690_mc_init()
200 	radeon_gtt_location(rdev, &rdev->mc);  in rs690_mc_init()
365 	if (rdev->mc.igp_sideport_enabled) {  in rs690_crtc_bandwidth_compute()
687 			S_000100_MC_FB_START(rdev->mc.vram_start >> 16) |  in rs690_mc_program()
688 			S_000100_MC_FB_TOP(rdev->mc.vram_end >> 16));  in rs690_mc_program()
690 		S_000134_HDP_FB_START(rdev->mc.vram_start >> 16));  in rs690_mc_program()