360 				struct radeon_ib *ib,  in radeon_vm_set_pages()  argument
369 		radeon_asic_vm_copy_pages(rdev, ib, pe, src, count);  in radeon_vm_set_pages()
372 		radeon_asic_vm_write_pages(rdev, ib, pe, addr,  in radeon_vm_set_pages()
376 		radeon_asic_vm_set_pages(rdev, ib, pe, addr,  in radeon_vm_set_pages()
390 	struct radeon_ib ib;  in radeon_vm_clear_bo()  local
406 	r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, 256);  in radeon_vm_clear_bo()
410 	ib.length_dw = 0;  in radeon_vm_clear_bo()
412 	radeon_vm_set_pages(rdev, &ib, addr, 0, entries, 0, 0);  in radeon_vm_clear_bo()
413 	radeon_asic_vm_pad_ib(rdev, &ib);  in radeon_vm_clear_bo()
414 	WARN_ON(ib.length_dw > 64);  in radeon_vm_clear_bo()
416 	r = radeon_ib_schedule(rdev, &ib, NULL, false);  in radeon_vm_clear_bo()
420 	ib.fence->is_vm_update = true;  in radeon_vm_clear_bo()
421 	radeon_bo_fence(bo, ib.fence, false);  in radeon_vm_clear_bo()
424 	radeon_ib_free(rdev, &ib);  in radeon_vm_clear_bo()
647 	struct radeon_ib ib;  in radeon_vm_update_page_directory()  local
660 	r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, ndw * 4);  in radeon_vm_update_page_directory()
663 	ib.length_dw = 0;  in radeon_vm_update_page_directory()
683 				radeon_vm_set_pages(rdev, &ib, last_pde,  in radeon_vm_update_page_directory()
697 		radeon_vm_set_pages(rdev, &ib, last_pde, last_pt, count,  in radeon_vm_update_page_directory()
700 	if (ib.length_dw != 0) {  in radeon_vm_update_page_directory()
701 		radeon_asic_vm_pad_ib(rdev, &ib);  in radeon_vm_update_page_directory()
703 		radeon_sync_resv(rdev, &ib.sync, pd->tbo.resv, true);  in radeon_vm_update_page_directory()
704 		WARN_ON(ib.length_dw > ndw);  in radeon_vm_update_page_directory()
705 		r = radeon_ib_schedule(rdev, &ib, NULL, false);  in radeon_vm_update_page_directory()
707 			radeon_ib_free(rdev, &ib);  in radeon_vm_update_page_directory()
710 		ib.fence->is_vm_update = true;  in radeon_vm_update_page_directory()
711 		radeon_bo_fence(pd, ib.fence, false);  in radeon_vm_update_page_directory()
713 	radeon_ib_free(rdev, &ib);  in radeon_vm_update_page_directory()
731 				struct radeon_ib *ib,  in radeon_vm_frag_ptes()  argument
771 		radeon_vm_set_pages(rdev, ib, pe_start, addr, count,  in radeon_vm_frag_ptes()
779 		radeon_vm_set_pages(rdev, ib, pe_start, addr, count,  in radeon_vm_frag_ptes()
786 	radeon_vm_set_pages(rdev, ib, frag_start, addr, count,  in radeon_vm_frag_ptes()
793 		radeon_vm_set_pages(rdev, ib, frag_end, addr, count,  in radeon_vm_frag_ptes()
814 				 struct radeon_ib *ib,  in radeon_vm_update_ptes()  argument
831 		radeon_sync_resv(rdev, &ib->sync, pt->tbo.resv, true);  in radeon_vm_update_ptes()
847 				radeon_vm_frag_ptes(rdev, ib, last_pte,  in radeon_vm_update_ptes()
864 		radeon_vm_frag_ptes(rdev, ib, last_pte,  in radeon_vm_update_ptes()
915 	struct radeon_ib ib;  in radeon_vm_bo_update()  local
998 	r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, ndw * 4);  in radeon_vm_bo_update()
1001 	ib.length_dw = 0;  in radeon_vm_bo_update()
1007 			radeon_sync_fence(&ib.sync, vm->ids[i].last_id_use);  in radeon_vm_bo_update()
1010 	r = radeon_vm_update_ptes(rdev, vm, &ib, bo_va->it.start,  in radeon_vm_bo_update()
1014 		radeon_ib_free(rdev, &ib);  in radeon_vm_bo_update()
1018 	radeon_asic_vm_pad_ib(rdev, &ib);  in radeon_vm_bo_update()
1019 	WARN_ON(ib.length_dw > ndw);  in radeon_vm_bo_update()
1021 	r = radeon_ib_schedule(rdev, &ib, NULL, false);  in radeon_vm_bo_update()
1023 		radeon_ib_free(rdev, &ib);  in radeon_vm_bo_update()
1026 	ib.fence->is_vm_update = true;  in radeon_vm_bo_update()
1027 	radeon_vm_fence_pts(vm, bo_va->it.start, bo_va->it.last + 1, ib.fence);  in radeon_vm_bo_update()
1029 	bo_va->last_pt_update = radeon_fence_ref(ib.fence);  in radeon_vm_bo_update()
1030 	radeon_ib_free(rdev, &ib);  in radeon_vm_bo_update()