Lines Matching refs:tiling
3011 uint64_t tiling, uint32_t latency) in skl_wm_method2() argument
3022 if (tiling == I915_FORMAT_MOD_Y_TILED || in skl_wm_method2()
3023 tiling == I915_FORMAT_MOD_Yf_TILED) { in skl_wm_method2()
3099 p->plane[0].tiling = fb->modifier[0]; in skl_compute_wm_pipe_parameters()
3104 p->plane[0].tiling = DRM_FORMAT_MOD_NONE; in skl_compute_wm_pipe_parameters()
3162 p_params->tiling, in skl_compute_plane_wm()
3168 if (p_params->tiling == I915_FORMAT_MOD_Y_TILED || in skl_compute_plane_wm()
3169 p_params->tiling == I915_FORMAT_MOD_Yf_TILED) { in skl_compute_plane_wm()
3197 if (p_params->tiling == I915_FORMAT_MOD_Y_TILED || in skl_compute_plane_wm()
3198 p_params->tiling == I915_FORMAT_MOD_Yf_TILED) in skl_compute_plane_wm()
3669 intel_plane->wm.tiling = DRM_FORMAT_MOD_NONE; in skl_update_sprite_wm()
3684 intel_plane->wm.tiling = fb->modifier[0]; in skl_update_sprite_wm()