Lines Matching refs:pri_latency
916 dev_priv->wm.pri_latency[VLV_WM_LEVEL_PM2] = 3; in vlv_setup_wm_latency()
921 dev_priv->wm.pri_latency[VLV_WM_LEVEL_PM5] = 12; in vlv_setup_wm_latency()
922 dev_priv->wm.pri_latency[VLV_WM_LEVEL_DDR_DVFS] = 33; in vlv_setup_wm_latency()
936 if (dev_priv->wm.pri_latency[level] == 0) in vlv_compute_wm_level()
959 dev_priv->wm.pri_latency[level] * 10); in vlv_compute_wm_level()
1985 uint16_t pri_latency = dev_priv->wm.pri_latency[level]; in ilk_compute_wm_level() local
1991 pri_latency *= 5; in ilk_compute_wm_level()
2003 pri_latency, in ilk_compute_wm_level()
2234 changed = ilk_increase_wm_latency(dev_priv, dev_priv->wm.pri_latency, 12) | in snb_wm_latency_quirk()
2242 intel_print_wm_latency(dev, "Primary", dev_priv->wm.pri_latency); in snb_wm_latency_quirk()
2251 intel_read_wm_latency(dev, dev_priv->wm.pri_latency); in ilk_setup_wm_latency()
2253 memcpy(dev_priv->wm.spr_latency, dev_priv->wm.pri_latency, in ilk_setup_wm_latency()
2254 sizeof(dev_priv->wm.pri_latency)); in ilk_setup_wm_latency()
2255 memcpy(dev_priv->wm.cur_latency, dev_priv->wm.pri_latency, in ilk_setup_wm_latency()
2256 sizeof(dev_priv->wm.pri_latency)); in ilk_setup_wm_latency()
2261 intel_print_wm_latency(dev, "Primary", dev_priv->wm.pri_latency); in ilk_setup_wm_latency()
2475 return dev_priv->wm.pri_latency[level]; in ilk_wm_lp_latency()
7072 if ((IS_GEN5(dev) && dev_priv->wm.pri_latency[1] && in intel_init_pm()
7074 (!IS_GEN5(dev) && dev_priv->wm.pri_latency[0] && in intel_init_pm()