95 		dev_priv->mem_freq = 533;  in i915_pineview_get_mem_freq()
98 		dev_priv->mem_freq = 667;  in i915_pineview_get_mem_freq()
101 		dev_priv->mem_freq = 800;  in i915_pineview_get_mem_freq()
120 		dev_priv->mem_freq = 800;  in i915_ironlake_get_mem_freq()
123 		dev_priv->mem_freq = 1066;  in i915_ironlake_get_mem_freq()
126 		dev_priv->mem_freq = 1333;  in i915_ironlake_get_mem_freq()
129 		dev_priv->mem_freq = 1600;  in i915_ironlake_get_mem_freq()
134 		dev_priv->mem_freq = 0;  in i915_ironlake_get_mem_freq()
138 	dev_priv->ips.r_t = dev_priv->mem_freq;  in i915_ironlake_get_mem_freq()
231 		    fsb == latency->fsb_freq && mem == latency->mem_freq)  in intel_get_cxsr_latency()
623 					 dev_priv->fsb_freq, dev_priv->mem_freq);  in pineview_update_wm()
5328 		dev_priv->mem_freq = 800;  in valleyview_init_gt_powersave()
5331 		dev_priv->mem_freq = 1066;  in valleyview_init_gt_powersave()
5334 		dev_priv->mem_freq = 1333;  in valleyview_init_gt_powersave()
5337 	DRM_DEBUG_DRIVER("DDR speed: %d MHz\n", dev_priv->mem_freq);  in valleyview_init_gt_powersave()
5387 		dev_priv->mem_freq = 2000;  in cherryview_init_gt_powersave()
5390 		dev_priv->mem_freq = 1600;  in cherryview_init_gt_powersave()
5393 	DRM_DEBUG_DRIVER("DDR speed: %d MHz\n", dev_priv->mem_freq);  in cherryview_init_gt_powersave()
7109 					    dev_priv->mem_freq)) {  in intel_init_pm()
7114 				 dev_priv->fsb_freq, dev_priv->mem_freq);  in intel_init_pm()