691 	int htotal, hdisplay, clock, pixel_size;  in g4x_compute_wm0()  local
705 	hdisplay = to_intel_crtc(crtc)->config->pipe_src_w;  in g4x_compute_wm0()
710 	tlb_miss = display->fifo_size*display->cacheline_size - hdisplay * 8;  in g4x_compute_wm0()
722 	tlb_miss = cursor->fifo_size*cursor->cacheline_size - hdisplay * 8;  in g4x_compute_wm0()
777 	int hdisplay, htotal, pixel_size, clock;  in g4x_compute_srwm()  local
792 	hdisplay = to_intel_crtc(crtc)->config->pipe_src_w;  in g4x_compute_srwm()
797 	line_size = hdisplay * pixel_size;  in g4x_compute_srwm()
1431 		int hdisplay = to_intel_crtc(crtc)->config->pipe_src_w;  in i965_update_wm()  local
1440 			pixel_size * hdisplay;  in i965_update_wm()
1578 		int hdisplay = to_intel_crtc(enabled)->config->pipe_src_w;  in i9xx_update_wm()  local
1587 			pixel_size * hdisplay;  in i9xx_update_wm()