4316 		if (val > dev_priv->rps.efficient_freq + 1 && val > dev_priv->rps.cur_freq)  in gen6_set_rps_thresholds()
4321 		if (val <= dev_priv->rps.efficient_freq && val < dev_priv->rps.cur_freq)  in gen6_set_rps_thresholds()
4693 	dev_priv->rps.efficient_freq = dev_priv->rps.rp1_freq;  in gen6_init_rps_frequencies()
4699 			dev_priv->rps.efficient_freq =  in gen6_init_rps_frequencies()
4713 		dev_priv->rps.efficient_freq *= GEN9_FREQ_SCALER;  in gen6_init_rps_frequencies()
4725 				max_t(int, dev_priv->rps.efficient_freq,  in gen6_init_rps_frequencies()
5345 	dev_priv->rps.efficient_freq = valleyview_rps_rpe_freq(dev_priv);  in valleyview_init_gt_powersave()
5347 			 intel_gpu_freq(dev_priv, dev_priv->rps.efficient_freq),  in valleyview_init_gt_powersave()
5348 			 dev_priv->rps.efficient_freq);  in valleyview_init_gt_powersave()
5401 	dev_priv->rps.efficient_freq = cherryview_rps_rpe_freq(dev_priv);  in cherryview_init_gt_powersave()
5403 			 intel_gpu_freq(dev_priv, dev_priv->rps.efficient_freq),  in cherryview_init_gt_powersave()
5404 			 dev_priv->rps.efficient_freq);  in cherryview_init_gt_powersave()
5412 	dev_priv->rps.min_freq = dev_priv->rps.efficient_freq;  in cherryview_init_gt_powersave()
5418 		   dev_priv->rps.efficient_freq |  in cherryview_init_gt_powersave()
5530 			 intel_gpu_freq(dev_priv, dev_priv->rps.efficient_freq),  in cherryview_enable_rps()
5531 			 dev_priv->rps.efficient_freq);  in cherryview_enable_rps()
5533 	valleyview_set_rps(dev_priv->dev, dev_priv->rps.efficient_freq);  in cherryview_enable_rps()
5620 			 intel_gpu_freq(dev_priv, dev_priv->rps.efficient_freq),  in valleyview_enable_rps()
5621 			 dev_priv->rps.efficient_freq);  in valleyview_enable_rps()
5623 	valleyview_set_rps(dev_priv->dev, dev_priv->rps.efficient_freq);  in valleyview_enable_rps()
6219 	WARN_ON(dev_priv->rps.efficient_freq < dev_priv->rps.min_freq);  in intel_gen6_powersave_work()
6220 	WARN_ON(dev_priv->rps.efficient_freq > dev_priv->rps.max_freq);  in intel_gen6_powersave_work()