229 	state = dev_priv->csr.state;  in intel_csr_load_status_get()
246 	dev_priv->csr.state = state;  in intel_csr_load_status_set()
261 	u32 *payload = dev_priv->csr.dmc_payload;  in intel_csr_load_program()
279 	fw_size = dev_priv->csr.dmc_fw_size;  in intel_csr_load_program()
283 	for (i = 0; i < dev_priv->csr.mmio_count; i++) {  in intel_csr_load_program()
284 		I915_WRITE(dev_priv->csr.mmioaddr[i],  in intel_csr_load_program()
285 			dev_priv->csr.mmiodata[i]);  in intel_csr_load_program()
288 	dev_priv->csr.state = FW_LOADED;  in intel_csr_load_program()
299 	struct intel_csr *csr = &dev_priv->csr;  in finish_csr_load()  local
308 		i915_firmware_load_error_print(csr->fw_path, 0);  in finish_csr_load()
368 	if (dmc_header->mmio_count > ARRAY_SIZE(csr->mmioaddr)) {  in finish_csr_load()
373 	csr->mmio_count = dmc_header->mmio_count;  in finish_csr_load()
381 		csr->mmioaddr[i] = dmc_header->mmioaddr[i];  in finish_csr_load()
382 		csr->mmiodata[i] = dmc_header->mmiodata[i];  in finish_csr_load()
391 	csr->dmc_fw_size = dmc_header->fw_size;  in finish_csr_load()
393 	csr->dmc_payload = kmalloc(nbytes, GFP_KERNEL);  in finish_csr_load()
394 	if (!csr->dmc_payload) {  in finish_csr_load()
399 	dmc_payload = csr->dmc_payload;  in finish_csr_load()
406 	DRM_DEBUG_KMS("Finished loading %s\n", dev_priv->csr.fw_path);  in finish_csr_load()
426 	struct intel_csr *csr = &dev_priv->csr;  in intel_csr_ucode_init()  local
433 		csr->fw_path = I915_CSR_SKL;  in intel_csr_ucode_init()
435 		csr->fw_path = I915_CSR_BXT;  in intel_csr_ucode_init()
442 	DRM_DEBUG_KMS("Loading %s\n", csr->fw_path);  in intel_csr_ucode_init()
451 	ret = request_firmware_nowait(THIS_MODULE, true, csr->fw_path,  in intel_csr_ucode_init()
456 		i915_firmware_load_error_print(csr->fw_path, ret);  in intel_csr_ucode_init()
476 	kfree(dev_priv->csr.dmc_payload);  in intel_csr_ucode_fini()