Lines Matching refs:writeb
73 writeb(gpiodir, chip->base + GPIODIR); in pl061_direction_input()
90 writeb(!!value << offset, chip->base + (BIT(offset + 2))); in pl061_direction_output()
93 writeb(gpiodir, chip->base + GPIODIR); in pl061_direction_output()
99 writeb(!!value << offset, chip->base + (BIT(offset + 2))); in pl061_direction_output()
116 writeb(!!value << offset, chip->base + (BIT(offset + 2))); in pl061_set_value()
198 writeb(gpiois, chip->base + GPIOIS); in pl061_irq_type()
199 writeb(gpioibe, chip->base + GPIOIBE); in pl061_irq_type()
200 writeb(gpioiev, chip->base + GPIOIEV); in pl061_irq_type()
236 writeb(gpioie, chip->base + GPIOIE); in pl061_irq_mask()
249 writeb(gpioie, chip->base + GPIOIE); in pl061_irq_unmask()
268 writeb(mask, chip->base + GPIOIC); in pl061_irq_ack()
329 writeb(0, chip->base + GPIOIE); /* disable irqs */ in pl061_probe()
399 writeb(chip->csave_regs.gpio_is, chip->base + GPIOIS); in pl061_resume()
400 writeb(chip->csave_regs.gpio_ibe, chip->base + GPIOIBE); in pl061_resume()
401 writeb(chip->csave_regs.gpio_iev, chip->base + GPIOIEV); in pl061_resume()
402 writeb(chip->csave_regs.gpio_ie, chip->base + GPIOIE); in pl061_resume()