53 	void __iomem		*base;  member
71 	gpiodir = readb(chip->base + GPIODIR);  in pl061_direction_input()
73 	writeb(gpiodir, chip->base + GPIODIR);  in pl061_direction_input()
90 	writeb(!!value << offset, chip->base + (BIT(offset + 2)));  in pl061_direction_output()
91 	gpiodir = readb(chip->base + GPIODIR);  in pl061_direction_output()
93 	writeb(gpiodir, chip->base + GPIODIR);  in pl061_direction_output()
99 	writeb(!!value << offset, chip->base + (BIT(offset + 2)));  in pl061_direction_output()
109 	return !!readb(chip->base + (BIT(offset + 2)));  in pl061_get_value()
116 	writeb(!!value << offset, chip->base + (BIT(offset + 2)));  in pl061_set_value()
144 	gpioiev = readb(chip->base + GPIOIEV);  in pl061_irq_type()
145 	gpiois = readb(chip->base + GPIOIS);  in pl061_irq_type()
146 	gpioibe = readb(chip->base + GPIOIBE);  in pl061_irq_type()
198 	writeb(gpiois, chip->base + GPIOIS);  in pl061_irq_type()
199 	writeb(gpioibe, chip->base + GPIOIBE);  in pl061_irq_type()
200 	writeb(gpioiev, chip->base + GPIOIEV);  in pl061_irq_type()
217 	pending = readb(chip->base + GPIOMIS);  in pl061_irq_handler()
235 	gpioie = readb(chip->base + GPIOIE) & ~mask;  in pl061_irq_mask()
236 	writeb(gpioie, chip->base + GPIOIE);  in pl061_irq_mask()
248 	gpioie = readb(chip->base + GPIOIE) | mask;  in pl061_irq_unmask()
249 	writeb(gpioie, chip->base + GPIOIE);  in pl061_irq_unmask()
268 	writeb(mask, chip->base + GPIOIC);  in pl061_irq_ack()
292 		chip->gc.base = pdata->gpio_base;  in pl061_probe()
299 		chip->gc.base = -1;  in pl061_probe()
303 	chip->base = devm_ioremap_resource(dev, &adev->res);  in pl061_probe()
304 	if (IS_ERR(chip->base))  in pl061_probe()
305 		return PTR_ERR(chip->base);  in pl061_probe()
329 	writeb(0, chip->base + GPIOIE); /* disable irqs */  in pl061_probe()
370 	chip->csave_regs.gpio_dir = readb(chip->base + GPIODIR);  in pl061_suspend()
371 	chip->csave_regs.gpio_is = readb(chip->base + GPIOIS);  in pl061_suspend()
372 	chip->csave_regs.gpio_ibe = readb(chip->base + GPIOIBE);  in pl061_suspend()
373 	chip->csave_regs.gpio_iev = readb(chip->base + GPIOIEV);  in pl061_suspend()
374 	chip->csave_regs.gpio_ie = readb(chip->base + GPIOIE);  in pl061_suspend()
399 	writeb(chip->csave_regs.gpio_is, chip->base + GPIOIS);  in pl061_resume()
400 	writeb(chip->csave_regs.gpio_ibe, chip->base + GPIOIBE);  in pl061_resume()
401 	writeb(chip->csave_regs.gpio_iev, chip->base + GPIOIEV);  in pl061_resume()
402 	writeb(chip->csave_regs.gpio_ie, chip->base + GPIOIE);  in pl061_resume()