Lines Matching refs:gt_base
50 static void __iomem *gt_base; variable
69 upper = readl_relaxed(gt_base + GT_COUNTER1); in _gt_counter_read()
72 lower = readl_relaxed(gt_base + GT_COUNTER0); in _gt_counter_read()
73 upper = readl_relaxed(gt_base + GT_COUNTER1); in _gt_counter_read()
102 writel(ctrl, gt_base + GT_CONTROL); in gt_compare_set()
103 writel(lower_32_bits(counter), gt_base + GT_COMP0); in gt_compare_set()
104 writel(upper_32_bits(counter), gt_base + GT_COMP1); in gt_compare_set()
107 writel(delta, gt_base + GT_AUTO_INC); in gt_compare_set()
112 writel(ctrl, gt_base + GT_CONTROL); in gt_compare_set()
119 ctrl = readl(gt_base + GT_CONTROL); in gt_clockevent_shutdown()
122 writel(ctrl, gt_base + GT_CONTROL); in gt_clockevent_shutdown()
143 if (!(readl_relaxed(gt_base + GT_INT_STATUS) & in gt_clockevent_interrupt()
161 writel_relaxed(GT_INT_STATUS_EVENT_FLAG, gt_base + GT_INT_STATUS); in gt_clockevent_interrupt()
215 writel(0, gt_base + GT_CONTROL); in gt_clocksource_init()
216 writel(0, gt_base + GT_COUNTER0); in gt_clocksource_init()
217 writel(0, gt_base + GT_COUNTER1); in gt_clocksource_init()
219 writel(GT_CONTROL_TIMER_ENABLE, gt_base + GT_CONTROL); in gt_clocksource_init()
267 gt_base = of_iomap(np, 0); in global_timer_of_register()
268 if (!gt_base) { in global_timer_of_register()
319 iounmap(gt_base); in global_timer_of_register()