Lines Matching refs:pr_err

171 		pr_err("%s: Out of memory\n", __func__);  in _of_pll_clk_init()
193 		pr_err("%s: ioremap failed\n", __func__);  in _of_pll_clk_init()
222 	pr_err("%s: error initializing pll %s\n", __func__, node->name);  in _of_pll_clk_init()
263 		pr_err("%s: ioremap failed\n", __func__);  in of_pll_div_clk_init()
269 		pr_err("%s: missing parent clock\n", __func__);  in of_pll_div_clk_init()
274 		pr_err("%s: missing 'shift' property\n", __func__);  in of_pll_div_clk_init()
279 		pr_err("%s: missing 'bit-mask' property\n", __func__);  in of_pll_div_clk_init()
288 		pr_err("%s: error registering divider %s\n", __func__, clk_name);  in of_pll_div_clk_init()
307 		pr_err("%s: ioremap failed\n", __func__);  in of_pll_mux_clk_init()
313 		pr_err("%s: missing parent clocks\n", __func__);  in of_pll_mux_clk_init()
318 		pr_err("%s: missing 'shift' property\n", __func__);  in of_pll_mux_clk_init()
323 		pr_err("%s: missing 'bit-mask' property\n", __func__);  in of_pll_mux_clk_init()
333 		pr_err("%s: error registering mux %s\n", __func__, clk_name);  in of_pll_mux_clk_init()