285 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)  in kvm_set_apic_base()  argument
289 	u64 new_state = msr_info->data &  in kvm_set_apic_base()
294 	if (!msr_info->host_initiated &&  in kvm_set_apic_base()
295 	    ((msr_info->data & reserved_bits) != 0 ||  in kvm_set_apic_base()
303 	kvm_lapic_set_base(vcpu, msr_info->data);  in kvm_set_apic_base()
2027 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)  in kvm_set_msr_common()  argument
2030 	u32 msr = msr_info->index;  in kvm_set_msr_common()
2031 	u64 data = msr_info->data;  in kvm_set_msr_common()
2077 		return kvm_set_apic_base(vcpu, msr_info);  in kvm_set_msr_common()
2085 			if (!msr_info->host_initiated) {  in kvm_set_msr_common()
2096 		if (!msr_info->host_initiated)  in kvm_set_msr_common()
2112 		if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {  in kvm_set_msr_common()
2181 			return kvm_pmu_set_msr(vcpu, msr_info);  in kvm_set_msr_common()
2201 					     msr_info->host_initiated);  in kvm_set_msr_common()
2222 			return kvm_pmu_set_msr(vcpu, msr_info);  in kvm_set_msr_common()
2284 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)  in kvm_get_msr_common()  argument
2286 	switch (msr_info->index) {  in kvm_get_msr_common()
2303 		msr_info->data = 0;  in kvm_get_msr_common()
2309 		if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))  in kvm_get_msr_common()
2310 			return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);  in kvm_get_msr_common()
2311 		msr_info->data = 0;  in kvm_get_msr_common()
2314 		msr_info->data = 0x100000000ULL;  in kvm_get_msr_common()
2318 		return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);  in kvm_get_msr_common()
2320 		msr_info->data = 3;  in kvm_get_msr_common()
2334 		msr_info->data = 1 << 24;  in kvm_get_msr_common()
2337 		msr_info->data = kvm_get_apic_base(vcpu);  in kvm_get_msr_common()
2340 		return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);  in kvm_get_msr_common()
2343 		msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);  in kvm_get_msr_common()
2346 		msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;  in kvm_get_msr_common()
2349 		msr_info->data = vcpu->arch.ia32_misc_enable_msr;  in kvm_get_msr_common()
2352 		if (!msr_info->host_initiated)  in kvm_get_msr_common()
2354 		msr_info->data = vcpu->arch.smbase;  in kvm_get_msr_common()
2358 		msr_info->data = 1000ULL;  in kvm_get_msr_common()
2360 		msr_info->data |= (((uint64_t)4ULL) << 40);  in kvm_get_msr_common()
2363 		msr_info->data = vcpu->arch.efer;  in kvm_get_msr_common()
2367 		msr_info->data = vcpu->kvm->arch.wall_clock;  in kvm_get_msr_common()
2371 		msr_info->data = vcpu->arch.time;  in kvm_get_msr_common()
2374 		msr_info->data = vcpu->arch.apf.msr_val;  in kvm_get_msr_common()
2377 		msr_info->data = vcpu->arch.st.msr_val;  in kvm_get_msr_common()
2380 		msr_info->data = vcpu->arch.pv_eoi.msr_val;  in kvm_get_msr_common()
2388 		return get_msr_mce(vcpu, msr_info->index, &msr_info->data);  in kvm_get_msr_common()
2399 		msr_info->data = 0x20000000;  in kvm_get_msr_common()
2405 					     msr_info->index, &msr_info->data);  in kvm_get_msr_common()
2418 		msr_info->data = 0xbe702111;  in kvm_get_msr_common()
2423 		msr_info->data = vcpu->arch.osvw.length;  in kvm_get_msr_common()
2428 		msr_info->data = vcpu->arch.osvw.status;  in kvm_get_msr_common()
2431 		if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))  in kvm_get_msr_common()
2432 			return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);  in kvm_get_msr_common()
2434 			vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);  in kvm_get_msr_common()
2437 			vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);  in kvm_get_msr_common()
2438 			msr_info->data = 0;  in kvm_get_msr_common()