214 static void shared_msr_update(unsigned slot, u32 msr)  in shared_msr_update()  argument
226 	rdmsrl_safe(msr, &value);  in shared_msr_update()
231 void kvm_define_shared_msr(unsigned slot, u32 msr)  in kvm_define_shared_msr()  argument
234 	shared_msrs_global.msrs[slot] = msr;  in kvm_define_shared_msr()
1040 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)  in kvm_set_msr()  argument
1042 	switch (msr->index) {  in kvm_set_msr()
1048 		if (is_noncanonical_address(msr->data))  in kvm_set_msr()
1065 		msr->data = get_canonical(msr->data);  in kvm_set_msr()
1067 	return kvm_x86_ops->set_msr(vcpu, msr);  in kvm_set_msr()
1076 	struct msr_data msr;  in do_get_msr()  local
1079 	msr.index = index;  in do_get_msr()
1080 	msr.host_initiated = true;  in do_get_msr()
1081 	r = kvm_get_msr(vcpu, &msr);  in do_get_msr()
1085 	*data = msr.data;  in do_get_msr()
1091 	struct msr_data msr;  in do_set_msr()  local
1093 	msr.data = *data;  in do_set_msr()
1094 	msr.index = index;  in do_set_msr()
1095 	msr.host_initiated = true;  in do_set_msr()
1096 	return kvm_set_msr(vcpu, &msr);  in do_set_msr()
1410 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)  in kvm_write_tsc()  argument
1418 	u64 data = msr->data;  in kvm_write_tsc()
1517 	if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)  in kvm_write_tsc()
1899 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)  in set_msr_mce()  argument
1904 	switch (msr) {  in set_msr_mce()
1916 		if (msr >= MSR_IA32_MC0_CTL &&  in set_msr_mce()
1917 		    msr < MSR_IA32_MCx_CTL(bank_num)) {  in set_msr_mce()
1918 			u32 offset = msr - MSR_IA32_MC0_CTL;  in set_msr_mce()
2030 	u32 msr = msr_info->index;  in kvm_set_msr_common()  local
2033 	switch (msr) {  in kvm_set_msr_common()
2075 		return kvm_mtrr_set_msr(vcpu, msr, data);  in kvm_set_msr_common()
2079 		return kvm_x2apic_msr_write(vcpu, msr, data);  in kvm_set_msr_common()
2113 			bool tmp = (msr == MSR_KVM_SYSTEM_TIME);  in kvm_set_msr_common()
2173 		return set_msr_mce(vcpu, msr, data);  in kvm_set_msr_common()
2180 		if (kvm_pmu_is_valid_msr(vcpu, msr))  in kvm_set_msr_common()
2185 				    "0x%x data 0x%llx\n", msr, data);  in kvm_set_msr_common()
2200 		return kvm_hv_set_msr_common(vcpu, msr, data,  in kvm_set_msr_common()
2206 		vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);  in kvm_set_msr_common()
2219 		if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))  in kvm_set_msr_common()
2221 		if (kvm_pmu_is_valid_msr(vcpu, msr))  in kvm_set_msr_common()
2225 				    msr, data);  in kvm_set_msr_common()
2229 				    msr, data);  in kvm_set_msr_common()
2243 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)  in kvm_get_msr()  argument
2245 	return kvm_x86_ops->get_msr(vcpu, msr);  in kvm_get_msr()
2249 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)  in get_msr_mce()  argument
2255 	switch (msr) {  in get_msr_mce()
2272 		if (msr >= MSR_IA32_MC0_CTL &&  in get_msr_mce()
2273 		    msr < MSR_IA32_MCx_CTL(bank_num)) {  in get_msr_mce()
2274 			u32 offset = msr - MSR_IA32_MC0_CTL;  in get_msr_mce()
4869 	struct msr_data msr;  in emulator_get_msr()  local
4872 	msr.index = msr_index;  in emulator_get_msr()
4873 	msr.host_initiated = false;  in emulator_get_msr()
4874 	r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);  in emulator_get_msr()
4878 	*pdata = msr.data;  in emulator_get_msr()
4885 	struct msr_data msr;  in emulator_set_msr()  local
4887 	msr.data = data;  in emulator_set_msr()
4888 	msr.index = msr_index;  in emulator_set_msr()
4889 	msr.host_initiated = false;  in emulator_set_msr()
4890 	return kvm_set_msr(emul_to_vcpu(ctxt), &msr);  in emulator_set_msr()
7293 	struct msr_data msr;  in kvm_arch_vcpu_postcreate()  local
7298 	msr.data = 0x0;  in kvm_arch_vcpu_postcreate()
7299 	msr.index = MSR_IA32_TSC;  in kvm_arch_vcpu_postcreate()
7300 	msr.host_initiated = true;  in kvm_arch_vcpu_postcreate()
7301 	kvm_write_tsc(vcpu, &msr);  in kvm_arch_vcpu_postcreate()