Lines Matching defs:msr

62 #include <asm/msr.h>
214 static void shared_msr_update(unsigned slot, u32 msr)
226 	rdmsrl_safe(msr, &value);
231 void kvm_define_shared_msr(unsigned slot, u32 msr)
234 	shared_msrs_global.msrs[slot] = msr;
937  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1036  * Writes msr value into into the appropriate "register".
1040 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1042 	switch (msr->index) {
1048 		if (is_noncanonical_address(msr->data))
1065 		msr->data = get_canonical(msr->data);
1067 	return kvm_x86_ops->set_msr(vcpu, msr);
1076 	struct msr_data msr;
1079 	msr.index = index;
1080 	msr.host_initiated = true;
1081 	r = kvm_get_msr(vcpu, &msr);
1085 	*data = msr.data;
1091 	struct msr_data msr;
1093 	msr.data = *data;
1094 	msr.index = index;
1095 	msr.host_initiated = true;
1096 	return kvm_set_msr(vcpu, &msr);
1410 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1418 	u64 data = msr->data;
1517 	if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1899 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1904 	switch (msr) {
1916 		if (msr >= MSR_IA32_MC0_CTL &&
1917 		    msr < MSR_IA32_MCx_CTL(bank_num)) {
1918 			u32 offset = msr - MSR_IA32_MC0_CTL;
2030 	u32 msr = msr_info->index;
2033 	switch (msr) {
2075 		return kvm_mtrr_set_msr(vcpu, msr, data);
2079 		return kvm_x2apic_msr_write(vcpu, msr, data);
2113 			bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2173 		return set_msr_mce(vcpu, msr, data);
2180 		if (kvm_pmu_is_valid_msr(vcpu, msr))
2185 				    "0x%x data 0x%llx\n", msr, data);
2200 		return kvm_hv_set_msr_common(vcpu, msr, data,
2206 		vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2219 		if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2221 		if (kvm_pmu_is_valid_msr(vcpu, msr))
2225 				    msr, data);
2229 				    msr, data);
2239  * Reads an msr value (of 'msr_index') into 'pdata'.
2243 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2245 	return kvm_x86_ops->get_msr(vcpu, msr);
2249 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2255 	switch (msr) {
2272 		if (msr >= MSR_IA32_MC0_CTL &&
2273 		    msr < MSR_IA32_MCx_CTL(bank_num)) {
2274 			u32 offset = msr - MSR_IA32_MC0_CTL;
4869 	struct msr_data msr;
4872 	msr.index = msr_index;
4873 	msr.host_initiated = false;
4874 	r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4878 	*pdata = msr.data;
4885 	struct msr_data msr;
4887 	msr.data = data;
4888 	msr.index = msr_index;
4889 	msr.host_initiated = false;
4890 	return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
7293 	struct msr_data msr;
7298 	msr.data = 0x0;
7299 	msr.index = MSR_IA32_TSC;
7300 	msr.host_initiated = true;
7301 	kvm_write_tsc(vcpu, &msr);