78 static inline void apic_set_reg(struct kvm_lapic *apic, int reg_off, u32 val)  in apic_set_reg()  function
219 	apic_set_reg(apic, APIC_SPIV, val);  in apic_set_spiv()
233 	apic_set_reg(apic, APIC_ID, id << 24);  in kvm_apic_set_id()
239 	apic_set_reg(apic, APIC_LDR, id);  in kvm_apic_set_ldr()
247 	apic_set_reg(apic, APIC_ID, id << 24);  in kvm_apic_set_x2apic_id()
248 	apic_set_reg(apic, APIC_LDR, ldr);  in kvm_apic_set_x2apic_id()
294 	apic_set_reg(apic, APIC_LVR, v);  in kvm_apic_set_version()
575 		apic_set_reg(apic, APIC_PROCPRI, ppr);  in apic_update_ppr()
583 	apic_set_reg(apic, APIC_TASKPRI, tpr);  in apic_set_tpr()
1383 			apic_set_reg(apic, APIC_DFR, val | 0x0FFFFFFF);  in apic_reg_write()
1401 				apic_set_reg(apic, APIC_LVTT + 0x10 * i,  in apic_reg_write()
1412 		apic_set_reg(apic, APIC_ICR, val & ~(1 << 12));  in apic_reg_write()
1419 		apic_set_reg(apic, APIC_ICR2, val);  in apic_reg_write()
1433 		apic_set_reg(apic, reg, val);  in apic_reg_write()
1441 		apic_set_reg(apic, APIC_LVTT, val);  in apic_reg_write()
1450 		apic_set_reg(apic, APIC_TMICT, val);  in apic_reg_write()
1457 		apic_set_reg(apic, APIC_TDCR, val);  in apic_reg_write()
1674 		apic_set_reg(apic, APIC_LVTT + 0x10 * i, APIC_LVT_MASKED);  in kvm_lapic_reset()
1677 		apic_set_reg(apic, APIC_LVT0,  in kvm_lapic_reset()
1681 	apic_set_reg(apic, APIC_DFR, 0xffffffffU);  in kvm_lapic_reset()
1683 	apic_set_reg(apic, APIC_TASKPRI, 0);  in kvm_lapic_reset()
1686 	apic_set_reg(apic, APIC_ESR, 0);  in kvm_lapic_reset()
1687 	apic_set_reg(apic, APIC_ICR, 0);  in kvm_lapic_reset()
1688 	apic_set_reg(apic, APIC_ICR2, 0);  in kvm_lapic_reset()
1689 	apic_set_reg(apic, APIC_TDCR, 0);  in kvm_lapic_reset()
1690 	apic_set_reg(apic, APIC_TMICT, 0);  in kvm_lapic_reset()
1692 		apic_set_reg(apic, APIC_IRR + 0x10 * i, 0);  in kvm_lapic_reset()
1693 		apic_set_reg(apic, APIC_ISR + 0x10 * i, 0);  in kvm_lapic_reset()
1694 		apic_set_reg(apic, APIC_TMR + 0x10 * i, 0);  in kvm_lapic_reset()