212 		      y6, y7, mem_ab, mem_cd, i, dir, store_ab) \  argument
244 		      y6, y7, mem_ab, mem_cd, i) \  argument
246 		      y6, y7, mem_ab, mem_cd, (i) + 2, 1, store_ab_state); \
248 		      y6, y7, mem_ab, mem_cd, (i) + 4, 1, store_ab_state); \
250 		      y6, y7, mem_ab, mem_cd, (i) + 6, 1, dummy_store);
253 		      y6, y7, mem_ab, mem_cd, i) \  argument
255 		      y6, y7, mem_ab, mem_cd, (i) + 7, -1, store_ab_state); \
257 		      y6, y7, mem_ab, mem_cd, (i) + 5, -1, store_ab_state); \
259 		      y6, y7, mem_ab, mem_cd, (i) + 3, -1, dummy_store);
482 		     y6, y7, rio, key) \  argument
486 	vpxor 0 * 16(rio), x0, y7; \
505 		      y6, y7, mem_ab, mem_cd) \  argument
507 			 y5, y6, y7, (mem_ab), (mem_cd)); \
524 	vmovdqu y7, 7 * 16(mem_cd);
528 		    y5, y6, y7, key, stack_tmp0, stack_tmp1) \  argument
530 			 y7, x3, x7, stack_tmp0, stack_tmp1); \
537 	vpxor x0, y7, y7; \
555 		     y6, y7, rio) \  argument
571 	vmovdqu y7, 15 * 16(rio);