49 #define roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2, t3, t4, t5, t6, \  argument
70 	vmovdqa .Lpre_tf_lo_s4, t2; \
81 	filter_8bit(x3, t2, t3, t7, t6); \
82 	filter_8bit(x6, t2, t3, t7, t6); \
97 	vmovdqa .Lpost_tf_lo_s3, t2; \
107 	filter_8bit(x2, t2, t3, t7, t6); \
108 	filter_8bit(x5, t2, t3, t7, t6); \
114 	filter_8bit(x1, t4, t5, t7, t2); \
115 	filter_8bit(x4, t4, t5, t7, t2); \
119 	vpsrldq $2, t0, t2; \
124 	vpshufb t6, t2, t2; \
160 	vpxor t2, x5, x5; \
267 #define rol32_1_16(v0, v1, v2, v3, t0, t1, t2, zero) \  argument
276 	vpcmpgtb v2, zero, t2; \
278 	vpabsb t2, t2; \
287 	vpor t2, v3, v3; \
297 #define fls16(l, l0, l1, l2, l3, l4, l5, l6, l7, r, t0, t1, t2, t3, tt0, \  argument
308 	vpshufb tt0, t0, t2; \
316 	vpand l2, t2, t2; \
319 	rol32_1_16(t3, t2, t1, t0, tt1, tt2, tt3, tt0); \
325 	vpxor l6, t2, l6; \
339 	vpshufb tt0, t0, t2; \
347 	vpor 6 * 16(r), t2, t2; \
352 	vpxor 2 * 16(r), t2, t2; \
356 	vmovdqu t2, 2 * 16(r); \
367 	vpshufb tt0, t0, t2; \
375 	vpand 2 * 16(r), t2, t2; \
378 	rol32_1_16(t3, t2, t1, t0, tt1, tt2, tt3, tt0); \
382 	vpxor 6 * 16(r), t2, t2; \
386 	vmovdqu t2, 6 * 16(r); \
398 	vpshufb tt0, t0, t2; \
406 	vpor l6, t2, t2; \
413 	vpxor l2, t2, l2; \
418 #define transpose_4x4(x0, x1, x2, x3, t1, t2) \  argument
419 	vpunpckhdq x1, x0, t2; \
428 	vpunpckhqdq x2, t2, x3; \
429 	vpunpcklqdq x2, t2, x2;